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K. K. Low

dblp:99/4689 · DBLP profile ↗
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4ranked-venue papers
4as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 4 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › design for manufacturability › statistical design
design centering		 0.021991
A new methodology for the design centering of IC fabrication processes · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
An efficient methodology for building macromodels of IC fabrication processes · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Electronic design automation › technology computer-aided design
process modeling		 0.021991
A new methodology for the design centering of IC fabrication processes · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
An efficient methodology for building macromodels of IC fabrication processes · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Electronic design automation › design for manufacturability › design for yield
yield maximization		 0.011991
A new methodology for the design centering of IC fabrication processes · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991

Methods — techniques the papers use, named apart from their topics

macromodeling · 0.0problem decomposition · 0.0regression analysis · 0.0experimental design · 0.0
YearPublicationVenuePosition
1991 A new methodology for the design centering of IC fabrication processes
abstract
The authors describe a practical methodology that can be applied to optimize the process yield of IC fabrication lines. The yield maximization problem is first reformulated into a deterministic design centering problem. Macromodeling and problem decomposition are then applied to solve the design centering problem efficiently. The effectiveness of this methodology is illustrate through a simulation example involving a CMOS process adopted from an industrial line.>
K. K. Low, Stephen W. Director
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1989 A new methodology for the design centering of IC fabrication processes
abstract
A practical methodology that can be applied to optimize the process yield of IC fabrication lines is described. The yield maximization problem is first reformulated into a deterministic design centering problem. Macromodeling and problem decomposition are then applied to solve the design centering problem efficiently. The effectiveness of this methodology is illustrated through a simulation example involving a CMOS process adopted from an industrial line.>
K. K. Low, Stephen W. Director
 ICCAD1
1989 An efficient methodology for building macromodels of IC fabrication processes
abstract
An efficient macromodeling approach for statistical IC process design based on experimental design and regression analysis is described. Automatic selection of the input variables is done as part of the model-building procedure to reduce the problem dimension to a manageable size. The resulting macromodels are simple analytical expressions describing the device characteristics in terms of the fundamental process variables. The validity and efficiency of the macromodels obtained by the approach are illustrated through their use in an IC process design centering example. Although the approach has only been applied to the IC fabrication process level, the underlying methodology can also be used to obtain circuit-level macromodels.>
K. K. Low, Stephen W. Director
 IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1988 An efficient macromodeling approach for statistical IC process design
abstract
An efficient macromodeling approach for statistical IC process design based on experimental design and regression analysis is described. Automatic selection of the input variables is done as part of the model building procedure to reduce the problem dimension to a manageable size. The resulting macromodels are simple analytical expressions describing the device characteristics in terms of the fundamental process variables. The validity and efficiency of the macromodels obtained by the approach are illustrated through their use in an IC process device design centering example.>
K. K. Low, Stephen W. Director
 ICCAD1