Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Marty S. Cohen

dblp:99/5977 · DBLP profile ↗
← Back
4ranked-venue papers
1as first author
0since 2021 · last 1991
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Theory of computation · 3Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 50% Integrated circuit design · 50%
Software engineering, system software, and programming languages
1 paper
Programming languages and type systems · 100%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › arithmetic unit
arithmetic unit design
0.011983
CADAC: A Controlled-Precision Decimal Arithmetic Unit · IEEE Trans. Computers 1983
Integrated circuit design › digital arithmetic circuits
decimal arithmetic
0.011983
CADAC: A Controlled-Precision Decimal Arithmetic Unit · IEEE Trans. Computers 1983

Methods — techniques the papers use, named apart from their topics

interval arithmetic · 0.0exception handling · 0.0decimal arithmetic · 0.0
YearPublicationVenuePosition
1991 Specifications for a variable-precision arithmetic coprocessor
abstract
The authors have been developing a programming system intended to be especially convenient for scientific computing. Its main features are variable precision (decimal) floating-point arithmetic and convenient exception handling. The software implementation of the system has evolved over a number of years, and a partial hardware implementation of the arithmetic itself was constructed and used during the early stages of the project. Based on this experience, the authors have developed a set of specifications for an arithmetic coprocessor to support such a system. These specifications are described. An outline of the language features and how they can be used is also provided, to help justify the particular choice of coprocessor specifications. The authors also indicate what other hardware features would be most helpful to the systems programmer, especially for implementation of the exception handling.>
Thomas E. Hull, Marty S. Cohen, C. B. Hall
IEEE Symposium on Computer Arithmetic2
1988 Exception handling in scientific computing
abstract
This paper describes some simple programming language facilities for raising and handling exceptions, and demonstrates, with a number of examples, their effectiveness in a scientific computing environment. Only a small number of predefined exceptions need to be introduced into the language, but any number of user-defined exceptions can he introduced by the programmer. A key feature is that handlers are attached to operators that can raise exceptions (including user-defined functions and procedures, as well as built-in operators), rather than to expressions or statements. The programmer has a great deal of freedom in specifying what action is to be taken in case an exception arises. The implementation and the applications are mainly concerned with scientific computing, but we believe the facilities are applicable in other areas as well.
Thomas E. Hull, Marty S. Cohen, J. T. M. Sawshuk, David B. Wortman
ACM Trans. Math. Softw.2
1987 Toward an ideal computer arithmetic
abstract
A new computer arithmetic is described. Closely related built-in functions are included. A user's point of view is taken, so that the emphasis is on what language features are available to a user. The main new feature is flexible precision control of decimal floating-point arithmetic. It is intended that the language facilities be sufficient for describing numerical processes one might want to implement, while at the same time being simple to use, and implementable in a reasonably efficient manner. Illustrative examples are based on experience with an existing software implementation.
Thomas E. Hull, Marty S. Cohen
IEEE Symposium on Computer Arithmetic2
1983 CADAC: A Controlled-Precision Decimal Arithmetic Unit
abstract
This paper describes the design of an arithmetic unit called CADAC (clean arithmetic with decimal base and controlled precision). Programming language specifications for carrying out "ideal" floating-point arithmetic are described first. These specifications include detailed requirements for dynamic precision control and exception handling, along with both complex and interval arithmetic at the level of a programming language such as Fortran or PL/I.
Marty S. Cohen, Thomas E. Hull, V. Carl Hamacher
IEEE Trans. Computers1