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EDBT 2026 Demo / reviewers in the wild / expert

Dimitrios Mavroidis

dblp:99/6212 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
coverage analysis		 0.011996
Code Generation and Analysis for the Functional Verification of Microprocessors · DAC 1996
Electronic design automation › hardware verification and test
functional verification		 0.011996
Code Generation and Analysis for the Functional Verification of Microprocessors · DAC 1996
Electronic design automation › hardware verification and test
hardware verification		 0.011996
Code Generation and Analysis for the Functional Verification of Microprocessors · DAC 1996
Electronic design automation › hardware verification and test › test generation
test case generation		 0.011996
Code Generation and Analysis for the Functional Verification of Microprocessors · DAC 1996

Methods — techniques the papers use, named apart from their topics

pseudorandom generation · 0.0heuristic algorithm · 0.0constraint solving · 0.0
YearPublicationVenuePosition
1996 Code Generation and Analysis for the Functional Verification of Microprocessors
abstract
A collection of code generation tools which assist designers in the functional verification of high performance microprocessors is presented.These tools produce interesting test cases by using a variety of code generation methods including heuristic algorithms, constraint-solving systems, user-provided templates, and pseudorandom selection.Run-time analysis and characterization of the generated programs provide an evaluation of their effectiveness in verifying a microprocessor design, and suggest improvements to the code generation process.An environment combining the code generation tools with the analysis tools has been developed, and it has provided excellent functional coverage for several generations of high-performance microprocessors.
Anoosh Hosseini, Dimitrios Mavroidis, Pavlos Konas
 DAC2