Arithmetic is a key component and is ubiquitous in today’s digital world, ranging from embedded to high-performance computing systems. With machine learning at the fore in a wide range of application domains from wearables to automotive to avionics to weather prediction, sufficiently accurate yet low-cost arithmetic is the need for the day. Recently, there have been several advances in the domain of computer arithmetic, which includes high-precision anchored numbers from ARM, posit arithmetic, bfloat16, etc. as an alternative to IEEE 754-2008 compliant arithmetic. Optimizations on fixed-point and integer arithmetic are also being pursued actively for low-power computing architectures. Furthermore, approximate computing and transprecision/mixed-precision computing have been exciting areas of research forever. While academic research in the domain of computer arithmetic has a long history, industrial adoption of some of these new data types and techniques is in its early stages and expected to increase in the future. bfloat16 is an excellent example for this. In this paper, we bring academia and industry together to discuss the latest results and future directions for research in the domain of next-generation computer arithmetic, especially for edge computing.

Hardware implementation of Floating Point Units (FPUs) has been a key area of research due to their massive area and energy footprints. Recently, a proposal was made to replace IEEE 754-2008 technical standard compliant FPUs with Posit Arithmetic Units (PAUs) due to the greater accuracy, speed, and simpler hardware design. In this paper, we present the architecture of a parameterized PAU generator that can generate PAU adders and PAU multipliers of any bit-width pre-synthesis. We synthesize generated arithmetic units using the parameterized PAU generator for 8-bit, 16-bit, and 32-bit adders and multipliers and compare them with IEEE 754-2008 compliant adders and multipliers. Both, synthesis for Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) are performed. In our comparison of m-bit PAU units with n-bit IEEE 754-2008 compliant units, it is observed that the area and energy of a PAU adder and multiplier are comparable to their IEEE 754-2008 compliant counterparts where m=n. We argue that an n-bit IEEE 754-2008 adder and multiplier can be safely replaced with an m-bit PAU adder and multiplier where m

SUMMARY Geographically dispersed work is a fundamental trend that has shaped software development in the past few decades. Although researchers have shown that such a trend has its costs in terms of product quality, the past empirical work has neglected to consider the multidimensional nature of geographic dispersion and limited attention has been given to the nature of technical coupling in the context of distributed development. The work reported in this paper seeks to achieve a better understanding of how the quality of systems produced by distributed development projects is impacted by the various dimensions of geographic dispersion and by the forms of technical coupling. We examined 189 software projects from a multinational development organization and our results revealed the various dimensions of distribution that had an independent and complementary impact on the software quality. In particular, we found that projects with uneven distributions of developers across locations were more likely to exhibit higher levels of defects than projects with balanced distributions. Our results also showed that logical dependencies among architectural components are significantly more important for projects than syntactic dependencies. Moreover, considering technical coupling as conditional on project boundaries revealed that internal and external dependencies have a significant and independent impact on the software quality. Copyright © 2010 John Wiley & Sons, Ltd.

The impact of distribution on global software development project is well established. Most of the empirical work has focused of a single dimension of distribution such as geographical distance or difference in time zones across locations, leaving other important dimensions of distribution unexplored. In this paper, we take a multi-dimensional view of distribution. In particular, we examined the impact of the nature of the distribution of development teams as well as the nature of the distribution of work on project quality using data from 189 distributed software development projects. Our analysis revealed that projects with uneven distributions of developers across locations were more likely to exhibit higher levels of defects than those projects with balanced distributions. Similarly, projects with uneven distributions of development effort across locations were more likely to exhibit higher levels of defects than those projects with balanced distributions.

An extensive body of research has developed in the area of software processes improvement and maturity models. Despite being a quite influential body of work, little is known about how software process maturity models and improvement activities relate to a major trend in the software industry: geographic distribution of development activities. In this paper, we seek to achieve a better understanding of the relationship between software process maturity and geographic distribution. In particular, we studied their combined impact on software quality. Using data from a multi-national software development organization, our analyses revealed that process maturity and the multiple dimensions of distribution have a significant impact on the quality of software components. More importantly, our analyses showed that the benefits of increases in process maturity diminish as the development work becomes more distributed, a result that has major implications for future research work in the process and the global software engineering literature as well as important implications for practitioners.