According to user's intent, Broder classified Web queries into three classes: navigational, informational and transactional. However, current search engines do not provide relevant search results based on the user's intent. In this paper, we propose a user intent based searching mechanism (UIBS for short) in order to enable precise discovery of a Web site (for navigational searching) as well as aggregating of their information (for informational searching) and performing further activities (for transactional searching). We first propose a Web site capability description interface for the explicit description of a Web site's capability and a search interface that enables explicit description of user's search intents, preferences, and query on the information. And then we describe the process of the query engine which provides relevant search results based on the user's intent, preferences, and requirements. Finally, a test example is given to show the availability of the proposed UIBS mechanism.

Fine-grained multithreading based on a natural model, such as dataflow model, is promising in achieving high efficiency and high programming productivity. In this paper, we discuss operating system issues for fine-grained multithread programs. We are developing an operating system called CEFOS based on a dataflow based computation model. A program on CEFOS consists of zero-wait threads which run to completion without suspension once started. Firing control among such threads is performed in a dataflow manner along with continuation relations in the program. Target platforms include fuce processor, which is dedicated to fine-grained multithreading, and commodity processors such as Intel x86. In this paper, after introducing our basic model and our operating system model, we discuss implementation issues on fuce and commodity platforms. The evaluation results indicate that our approach on commodity platforms is effective in reducing overheads while our approach on a special architecture naturally exploit parallelism even in I/O handling.

The semantic Web and Web services technologies have provided both new possibilities and challenges to automatic information processing. There are a lot of researches on applying these new technologies to current personal Web information retrieval systems, but no research addresses the semantic issues from the whole life cycle and architecture point of view. Web services provide a new way for accessing Web resources, but until now, they have been managed separately from conventional Web contents resources. In this paper, we point out new system requirements and propose a conceptual architecture for a personal semantic Web information retrieval system. It incorporates semantic Web, Web sendees, and multiagent technologies to enable not only precise location of Web resources but also the automatic or semiautomatic integration of hybrid Web contents and Web service resources.

The constraint-based routed label distribution protocol (CR-LDP) is a well-known traffic engineering technologies in MPLS networks. CR-LDP is a signaling protocol for establishing a label switching path (LSP) and has a function such that CR-LDP coordinates LSPs that conflict (for example, the LSPs share a link). However CR-LDP coordinates such LSPs only. Therefore such coordination (i.e. rerouting a LSP) would result in other conflicts (i.e. the rerouted LSP would share a link with other LSPs). This paper proposes a new traffic engineering method which is called the "multiagent-based path rerouting method (MPRM)". When a conflict occurs, MPRM coordinates all LSPs without concerning the conflict in order to avoid new conflicts caused by dissolving the conflict. For avoidance of new conflicts, MPRM performs not only rerouting of LSPs that make the conflict but also rerouting some LSPs that result in no conflicts. This paper also evaluates basic performance of CR-LDP and MPRM.

The authors describe the concept of Intelligent Trader and the network management architecture based on it. First, we describe problems in the modern network system, from the viewpoint of network management. Next, we describe the similarity and difference between network management and application integration. Then we discuss the merits and problems of the application integration technique when applying it to network management. Finally, we propose the intelligent trader system which incorporates the application integration technique into the network management.

In this paper, we propose a strategy to improve the performance of image reconstruction using a selective attention mechanism in a multi-layered neural network. The selective attention mechanism enables us to use top-down information as high-level and global constraints. The traditional algorithms using regularization techniques are quite sensitive to values of parameters, and it is quite difficult to select their appropriate values, because the algorithms use low-level and local constraints. Our strategy uses high-level and global constraints, and modifies the values of parameters locally and automatically.

Latency, caused by remote memory access and remote procedure call, is one of the most serious problems in massively parallel computers. In order to eliminate the processors' idle time caused by these latencies, processors must perform fast context switching among fine-grain concurrent processes. In this paper, we propose a processor architecture, called Datarol-II, that promotes efficient fine-grain multi-thread execution by performing fast context switching among fine-grain concurrent processes. In the Datarol-II processor, an implicit register load/store mechanism is embedded in the execution pipeline in order to reduce memory access overhead caused by context switching. In order to reduce local memory access latency, a two-level hierarchical memory system and a load control mechanism are also introduced. We describe the Datarol-II processor architecture, and show its evaluation results.>

Article A dataflow language with object-based extension and its implementation on a commercially available parallel machine Share on Authors: Shigeru Kusakabe Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, Japan Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, JapanView Profile , Taku Nagai Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, Japan Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, JapanView Profile , Yoshihiro Yamashita Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, Japan Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, JapanView Profile , Rin-ichiro Taniguchi Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, Japan Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, JapanView Profile , Makoto Amamiya Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, Japan Dept.of Information Systems, Kyushu University, Kasuga Fukuoka 816, JapanView Profile Authors Info & Claims ICS '95: Proceedings of the 9th international conference on SupercomputingJuly 1995 Pages 308–317https://doi.org/10.1145/224538.224575Online:03 July 1995Publication History 8citation202DownloadsMetricsTotal Citations8Total Downloads202Last 12 Months0Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access

In this paper, we describe a method to construct automatically, from a series of images of objects, a model of an object class. The model is described by a set of 2 dimensional features of segmented regions and the relations among them. To make models of objects, we introduce the concept of the segmentation tree-which represents image segmentation at various levels of abstraction-and also a model generation method based on a series of segmentation trees. Using this segmentation tree, we can cope with the problem of diversity of segmentation patterns and can easily make stable object-models.>

An autonomous multiprocessor (AMP) for image processing and computer vision is presented. It provides high-performance image processing. It has many processor elements (PEs) connected to each other through a communication network. Each PE is asynchronously executed by a data flow control mechanism. It is designed on the basis of a circular pipeline architecture and has a mechanism to work like multiple logical PEs. Each pixel of an image is mapped onto one logical PE, and its data is stored in an operand memory register of a logical PE. Image data is stored distributively in the PEs of the system, and required pixel values are transferred to other PEs by inter-PE communication.>

The architecture of a data flow machine, called DFM, is developed for parallel list processing. The DFM can maximally exploit parallelism inherent in list processing, due to its ultra-multi-processing mechanism, packet communication-based parallel and pipeline execution mechanism, and lenient cons mechanism. A practical DFM implementation is described. A DFM prototype machine is implemented and DFM performance is evaluated in a simulation on the register transfer level using several benchmark programs. The DFM single processor system is shown to be about five times faster than conventional machines which use the same device technology, while a multi-processor DFM system is shown to achieve a linear speed-up ratio of 0.6 ~ 0.9.

This paper presents the architecture of a highly parallel processor array system which executes programs by means of a data driven control mechanism. The data driven control mechanism makes it easy to construct an MIMD (multiple instruction stream and multiple data stream) system, since it unifies inter-processor data transfer and intra-processor execution control. The design philosophy of the data flow processor array system presented in this paper is to achieve high performance by adapting a system structure to operational characteristics of application programs, and also to attain flexibility through executing instructions based on a data driven mechanism. The operational characteristics of the proposed system are analyzed using a probability model of the system behavior. Comparing the analytical results with the simulation results through an experimental hardware system, the results of the analysis clarify the principal effectiveness of the proposed system. This system can achieve high operation rates and is neither sensitive to inter-processor communication delay nor sensitive to system load imbalance.