This paper presents an ion-sensitive field-effect transistor (ISFET)-based biosensor for detecting phosphatidylserine (PS), a key apoptosis marker. The sensor, featuring a silicon nitride (Si3N4) membrane functionalized with Annexin V, achieved sensitivities of 20 mV/decade for Ag/AgCl electrodes and 52 mV/decade for gold electrodes, with a limit of detection down to 10 nM. Surface modification was validated via fluorescence microscopy, showing a twofold increase in signal intensity upon PS binding. Compared to fluorescence microscopy and enzyme-linked immunosorbent assay (ELISA), which require extensive processing, the ISFET-based approach offers a rapid, label-free, and miniaturizable alternative. Optimized surface treatment enhanced performance, making it suitable for real-time apoptotic marker detection and integration into portable diagnostics.

Single-photon Light Detection and Ranging (LiDAR) systems are often equipped with an array of detectors for improved spatial resolution and sensing speed. However, given a fixed amount of flux produced by the laser transmitter across the scene, the per-pixel Signal-to-Noise Ratio (SNR) will decrease when more pixels are packed in a unit space. This presents a fundamental trade-off between the spatial resolution of the sensor array and the SNR received at each pixel. Theoretical characterization of this fundamental limit is explored. By deriving the photon arrival statistics and introducing a series of new approximation techniques, the Mean Squared Error (MSE) of the maximum-likelihood estimator of the time delay is derived. The theoretical predictions align well with simulations and real data.

A handheld fluorometer for detecting blue/green fluorescence from small Stokes shift fluorophores is presented in this paper. Two novel techniques have been introduced to emulate far-field operation while operating in the near field. A sensitivity of 26 (seconds per decade of dilution) and a resolution of 0.01 (concentration units) was achieved for detection of Alexa Fluor 488.

Several deep neural network-based image processing techniques were compared for the analysis of cellular behavior of cells cultured directly on Lab-on-CMOS devices. Lab-on- CMOS devices are typically opaque and use integrated circuits to implement functionality, so they must be observed using reflection mode microscopy and have prominent background features. These factors significantly increase the difficulty of the cell segmentation task due to image distortion and complex backgrounds. In this paper, we describe several techniques that have been implemented for use in the characterization of a Lab-on-CMOS capacitance sensor. Relative to previously reported approaches based on morphological filtering, the neural-net based approaches reported here improve the intersection-over-union metric for image segmentation from 57% to 85%. These tools will enable insight into the capabilities of capacitance sensing modalities for the monitoring of single cell events.

“Fail often to succeed sooner” is a common mantra that we are told is the secret to success. When reporting research results, however, scholars rarely write about their failed attempts and only focus on the successful ones. Perhaps the source of this disconnect between what we preach and what we do can be found in the underlying assumption that published work is meant to move the field forward and failed attempts supposedly do not. The goal of the confessions presented in this paper is to show that even failed attempts are genuine and valuable contributions to our field provided that we learn from our mistakes and correct them. The 27 confessions span from planning oversights, digital and analog design errors, misunderstanding of devices, overlooked parasitics, LVS errors, and troubles in testing.

We describe a capacitance sensor system-on-chip that has been incorporated into a lab-on-CMOS system for applications in monitoring cell viability. This paper presents system-level improvements to a capacitance sensor array that include programmable gain, active pixel settings, and serial bus addresses, while at the same time minimizing external bonding requirements towards developing a point-of-care device. Results from benchtop experiments are presented using dry flour to mimic for cell coverage, and show a change of up to 35 kHz. Estimation of electrode coverage is obtained using concurrent time-lapse imaging of the sensor surface which is then correlated to the sensor readings.

Integrating CMOS sensor chips to allow for wet experimentation on lab-on-CMOS devices is a challenging task. In this paper we describe a chip packaging method that will allow for simple integration and handling of small integrated circuit (IC) chips. A chip is embedded in an epoxy handle wafer to allow for photolithographic processing. Electrical connections are provided by a sputter-deposited copper layer and an electroplated nickel layer. Passivation was performed using a second epoxy layer. The process was evaluated by packaging a capacitance sensor chip and performing live cell culture experiments with package cleaning and reuse. Results showed good structural reliability in three repeated experiments over five cumulative days, with no adverse effects on the viability of cells.

Wearable electronics capable of recording and transmitting biosignals can provide convenient and pervasive health monitoring. The wireless transmission bandwidth limits the number of recording sites that can be monitored at one time. Compressed sensing (CS) is a promising approach that uses computationally efficient encoding to reduce the number of samples that are transmitted wirelessly, allowing more channels to be monitored over a transmission channel. The rakeness CS approach shows improved performance for higher compression rates, but in prior work it has only been evaluated for single channel data. We analyze the fidelity tradeoffs for compressed sensing implemented on a mobile electroencephalography (EEG) system. We propose several methods for spatiotemporal encoding in rakeness CS and evaluate the performance using a spontaneous EEG dataset recorded during moderate movement. Reconstruction performance depends strongly on the compression ratio and weakly on the method of spatiotemporal encoding. This suggests weak spatial correlation between the different channels of EEG data, which were recorded in an experiment involving self-initiated movement.

We report an adaptive capacitive transimpedance amplifier circuit for room temperature sensing of short wave infrared (SWIR) radiation. The photocircuit reduces junction leakage current by measuring the current across a photodiode held at zero bias. This is critical to enable room temperature SWIR detection using materials with smaller bandgaps (and higher leakage current) such as InGaAs, which are typically operated at cooled temperatures. The transimpedance amplifier incorporates a floating gate current mirror in order to precisely cancel offset using nonvolatile analog storage. We experimentally verify that we are able to precisely tune the input offset and demonstrate a reduction in dark current of an InGaAs photodiode by two orders of magnitude, from 700pA to 2.25pA, when comparing similar adaptive and non-adaptive circuits. These circuits have been fabricated in a standard 0.6μm CMOS process.

We describe a capacitance sensor array that has been incorporated into a lab-on-CMOS system for applications in monitoring cell viability. This paper presents measured experimental results of a high dynamic range capacitance sensor array. The sensors have been characterized and the data fitted to analytical models, allowing end-to-end calibration of the responses. The sensor exhibits a sensitivity of up to 593 kHz/fF, resolution down to 17.5 aF, and an input sensing range of 12 fF.

In this paper we present a simulation framework for testing and benchmarking the photon-limited performance of optic flow processing techniques. We explore the performance of “traditional” gradient-based and feature-based optic flow algorithms as well as the “biologically-inspired” elementary motion detector. We show that biologically-inspired spatial pooling techniques can successfully be implemented in the gradient-based image interpolation algorithm and the elementary motion detector to extend low-light capabilities by more than one order of magnitude. We also show that block matching algorithms can accurately compute optic flow even when a single frame may capture <;1000 photons. This framework provides a tool to further explore the mechanisms that underlie the observed low-light performance of biological vision systems and to understand the relative performance of different approaches for implementing optic flow in hardware.

Wireless sensor nodes capable of acquiring and transmitting biosignals are increasingly important to address future needs in healthcare monitoring. One of the main issues in designing these systems is the unavoidable energy constraint due to the limited battery lifetime, which strictly limits the amount of data that may be transmitted. Compressed Sensing (CS) is an emerging technique for introducing low-power, real-time compression of the acquired signals before transmission. The recently developed rakeness approach is capable of further increasing CS performance. In this paper we apply the rakeness-CS technique to enhance compression capabilities for electroencephalographic (EEG) signals, and particularly for Evoked Potentials (EP), which are recordings of the neural activity evoked by the presentation of a stimulus. Simulation results demonstrate that EPs are correctly reconstructed using rakeness-CS with a compression factor of 16. Additionally, some interesting denoising capabilities are identified: the high-frequency noise components are rejected and the 60 Hz power line noise is decreased by more than 20dB with respect to the state-of-the-art filtering when rakeness-CS techniques are applied to the EEG data stream.

We report a low cost mobile EEG system for characterizing cortical auditory responses. The system is built using commercial off-the-shelf components and each unit costs less than $200. It measures seven EEG channels plus one audio channel (envelope only), and communicates the data to external devices via Bluetooth. A novel implementation was pursued in order to support local signal compression using compressed sensing. At the same time, it provides a low cost solution that is useful for recording cortical auditory responses and extracting clinically relevant features of the waveform. This system has been designed with the eventual goal of long term monitoring of the brain activity of schizophrenic patients outside a clinical setting, in order to better understand auditory hallucinations and manage their ongoing treatment. In this preliminary study we obtained simultaneous audio and cortical recordings of evoked auditory responses from normal healthy subjects wearing the EEG for several hours in duration. We report evoked auditory responses for 2 Hz and 40 Hz click trains. We also report alpha wave responses, demonstrating stable and high quality recordings over a five hour period.

Capacitance sensing is an emerging technology for monitoring cell viability. This work extends a previously developed sensor that measured capacitive loading by cells on the oscillation frequency of a current-starved ring oscillator and converted the frequency to a digital value by counting oscillation cycles. The new sensor array has been developed into a one-chip lab-on-CMOS system with integrated temperature sensors, serial readout to an external microcontroller using an Inter-Integrated Circuit (I2C) bus, and automatic scanning to allow for autonomous data collection. To allow sensing at the required aF levels, the system was realized on single chip to reduce the baseline capacitance, and long counting times were employed. The I2C module was moved to the edge of the chip prevent exposing cells to unacceptably high temperatures during viability studies.

Ring oscillators (ROs) are popular due to their small area, modest power, wide tuning range, and ease of scaling with process technology. However, their use in many applications is limited due to poor phase noise and jitter performance. Thermal noise and flicker noise contribute jitter that decreases inversely with oscillation frequency. This paper describes a frequency-boost technique to reduce jitter in ROs. We boost the internal oscillation frequency and introduce a frequency divider following the oscillator to maintain the desired output frequency. This approach offers reduced jitter as well as the opportunity to trade off output jitter with power for dynamic performance management. The oscillator has 32 operating modes, corresponding to different values for the ring size and frequency division. In a 0.5-μm CMOS process, the highest oscillation frequency achieved is 25 MHz with a root-mean-square period jitter of 54 ps and a power consumption of 817 μW at 5 V supply. A jitter model for current-starved oscillators was derived and verified by measurement; a direct relationship between oscillation frequency and jitter was derived and measured. Compared with other oscillators, this design achieves the highest performance in terms of jitter per unit interval and figure-of-merit. The performance is expected to improve in more advanced technologies. The results are summarized to offer design guidance based on the frequency-boost technique.

In this paper we present a scalable 20×20 event-based imaging array. Each pixel consists of a large area (1200 μm2) single photon avalanche diode with dynamic quenching circuitry, compact 9-bit analog counter, comparator, and event generator. The array is designed for low-light imaging applications (<;0.1 lux) with a simulated worst case event readout speed of 33 MHz, pixel-level dynamic range of 134 dB, and array-level dynamic range of 132 dB. We implement this in a 0.50 μ m CMOS process with a 100 μm × 100 μm area pixel, a fill-factor of 20%, and a total chip size of 3 mm × 3 mm.

We present a low-light vision system platform that enables the testing and implementation of optic flow algorithms and kernel operations for micro-air vehicle navigation and obstacle avoidance capabilities. The system includes a 7×7 array of actively-quenched large-area single photon avalanche diodes, each having a compact 9-bit analog counter, and system-level time-of-fight range measurement with simulated sub-meter resolution. The system has a frame read-out rate of 100kHz and is implemented in a commercially available 0.5μm CMOS process.

CMOS chips are increasingly used for direct sensing and interfacing with fluidic and biological systems. CMOS circuits for sample acquisition, signal processing, and readout have been integrated with various sensors to form complex biosystems-on-chip. However, distinct and vexing technical challenges arise from the disparate requirements of biosensors and integrated circuits. From the perspective of integrated circuits, direct CMOS biosensing creates challenges in: packaging; materials selection; physical design constraints due to topography; MEMS post-processing of CMOS die; energy and power limitations; and transfer and processing of signals. From the perspective of biology, direct CMOS biosensing creates challenges in: fluidic integration; electrochemical effects; biocompatibility; environmental maintenance and surface treatments to support cell health and function; and optical assessment of opaque samples. We will describe these challenges and review lessons learned.

Capacitance based cell sensing has shown promising results for monitoring cell viability. Studies have shown direct correlation between cell health and measured capacitance. Prior sensors have used charge based capacitance measurement, which has limitations in offset correction, range, and resolution. An alternative approach to monitoring small changes in electrode capacitance is to measure frequency change of a current controlled ring oscillator containing a sensing electrode that acts as a variable capacitor. This sensor design has no need for on-chip offset correction, because the range of the digital output of the chip depends on the counter size rather than input voltage. In addition, the resolution for this sensor is limited only by the amount of read time given to each pixel. For an oscillation frequency of 40 MHz the sensors are expected to achieve a resolution of 2.6 aF. The sensor has been incorporated into a 4×4 array prototype which will be packaged for operation in cell culture and used in viability studies of mammalian cells.

Optic flow is commonly used to perform motion pattern detection and feature extraction. Previous work demonstrated a single-chip VLSI implementation of an optic flow sensor which can detect one-dimensional optical flow patterns. The novel sensor consists of an array of elementary motion detectors (EMDs) in conjunction with spatial weighting filters implemented using floating gate technology. Floating gate MOS transistors were used to program desired spatial weights as well as compensate for mismatch between EMDs. We report a new motion sensor which extends the previous work from a one-dimensional array of motion sensors to two orthogonal arrays in order to discern features of various two-dimensional motion patterns.

This paper presents an efficient, compact, and robust distance-only sensor for networked small robotic platforms with wireless communication and signal processing capabilities. The sensor determines inter-robot distances by measuring the Time Difference of Arrival (TDOA) between wireless radio frequency packets and audio pulses. Computational overhead has been reduced by an order of magnitude while the sensor resolution has been improved to 0.27 cm over a range of 75 cm, compared to a previous resolution of 1.1 cm. Error analysis identified timing jitter as the dominant contribution to measurement error and a significant factor in heading estimation error using distance-only measurements. The improvement in distance resolution is shown to improve system performance by reducing the motion planning decision error rate due to measurement uncertainty.

People rarely put in their papers the things that didn't work, the mistakes they made, and how they found out what went wrong. Such confessions can help others learn how to avoid similar mistakes. Twenty-six confessions were collected to form the bulk of this paper. Themes that arise are errors that result from not understanding the limitations of simulation tools in modeling physical reality, chip verification errors that result from lack of clear communication between designers, and projects that are considered in their own isolated environment of technical challenges rather than the broader context of their environment or application.

We describe a substrate for a Legged Chip, a CMOS integrated circuit with built in actuation mechanisms for motion. We have designed and fabricated a custom integrated circuit using a commercial 0.5μm CMOS technology which implements walking gait control. The circuit specifications and physical implementation have been designed to take into consideration the addition of thermal actuators through low- temperature MEMS surface processing on fabricated CMOS dies. External connections will be limited to two leads for providing power and ground. This work represents progress towards a fully autonomous mobile integrated circuit.

In this paper we study the information rates, bit energy and noise efficiency factor (NEF) of three simple amplifier topologies: the common source amplifier, self biased transconductor and the simple operational transconductance amplifier (OTA). The calculated information rates, bit energy and NEF are determined by experimentally based estimates of input referred noise. The self biased transconductor was found to have the highest information rate and lowest bit energy and NEF, while the simple OTA was found to have the lowest information rate and highest bit energy and NEF.

This paper reports a compact, robust distance-only sensor for networked small robotic platforms. Two methods of sensing distance (neglecting heading) between robots are discussed: Received Signal Strength Indicator (RSSI) and Time Difference of Arrival (TDOA). Both implementations make use of a commercially available wireless sensor network board for communication and processing. Although RSSI requires no additional hardware, TDOA requires several additional components including a sound source and microphone. While experimental results indicate that both methods can provide distance sensing within a local neighborhood, TDOA sensing was found to be more robust and accurate, providing 1 cm distance resolution over a range of 80 cm versus 2.4 cm for RSSI. These sensors have been integrated onto mini-robotic platforms by incorporating a heading estimator and controller.

We present a fly-inspired integrated motion image sensor for autonomous navigation with on-chip optic flow computation, mismatch compensation, and programmable spatial filters. The sensor computes spatial motion patterns from local motion signals extracted by elementary motion detectors (EMDs). Floating gate transistors are used to cancel fabrication mismatch in the EMDs and also to program spatial filtering coefficients. The sensor is the first reported motion image sensor that extracts multiple motion parameters from the spatial motion pattern, enabled by the mismatch compensation and programmable filters. An array of 19 EMDs provide inputs to 4 weighted spatial filters on a 3 × 3 mm2chip in 0.5 μm CMOS technology. Results from both benchtop tests and closed loop navigation of a ground vehicle are reported.

This paper presents a current normalization circuit with floating gate mismatch compensation. Normalization circuits are an important class of signal processing architectures, and although subthreshould MOS devices can efficiently implement these systems, their precision is often limited by fabrication mismatch. A current normalizer with outputs inversely proportional to the input signals was designed and simulated for a commercially available 0.5μm CMOS process. We show that through self-limiting floating gate mismatch compensation techniques the process induced system mismatch can be reduced by 78%.

The simple CMOS current mirror is a fundamental compositional element which is employed in a wide variety of analog and digital circuit designs. The use of CMOS current mirrors is appealing to circuit designers given the low cost associated with CMOS fabrication and the inherent simplicity of operation. Unfortunately, the simplicity of the CMOS current mirror makes it particularly susceptible to device mismatch due to process variations. In recent years the use of floating gate transistors for mismatch compensation has become increasingly popular. We report on our observations regarding the efficacy of this technique in both weak and strong inversion and present analytical and simulated results quantifying these observations. The central result is that although compensation using floating gates works well for correcting mismatch for subthreshold operation, similar compensation in above threshold operation results in the introduction of previously unseen mismatch effects.

We demonstrate the application of a handheld fluorometer optimized for UV excitable assays. We demonstrate the measurement of metabolic products as yeast cells germinate in dextrose solution. In particular we measure NADH which is produced during cellular respiration. The handheld fluorometer consists of a CMOS active pixel sensor with in-pixel CDS, coupled with a custom chromophore-polymer emission filter and a UV LED as the excitation source. The handheld fluorometer is able to detect as little as 10 µM of NADH, and in its present format should be applicable to any fluorescence assay with UV excitation and visible emission wavelengths.

The paper presents a fully differential capacitance sensor employing the CBCM technique to map differential input capacitances to rail-to-rail differential output voltages. The circuit has been designed for measuring capacitances in the ±20 fF range, appropriate for sensing live cells using on-chip microelectrodes. The paper also proposes an array architecture based on a shielded current routing bus that allows for a single measurement circuit to be shared by all the sensor pixels without compromising performance. This eliminates the need for individual pixel calibration. Each sensor pixel comprises 6 minimum size digital transistors, enabling high density integration. The sensor employs a 3-phase clocking scheme that enables gain tuning and also limits output voltage offsets. The paper presents data obtained from 5 chips fabricated in a commercially available 2-poly, 3-metal, 0.5 μm CMOS technology, each of them comprising individual circuits measuring the substrate-coupling capacitances of metal3 electrodes of varying sizes. The test data indicates successful sensor operation with a maximum sensitivity of 126 mV/fF, a maximum achievable resolution of 14 aF and an output dynamic range of 69.4 dB.

We report the design, analytical model and experimental noise performance from a photo sensor fabricated in a 0.5 mum commercial CMOS process. The sensor is a novel differential active pixel sensor which performs in-pixel correlated double sampling (CDS) to reduce correlated and environmental noise at the expense of increased thermally generated noise sources such as reset and readout noise. In comparison with a representative single ended sensor, the differential sensor exhibits an increased fundamental reset and readout noise of 117% and 58% respectively.

We maximized the information transmission for an integrating photosensor by optimizing the integration time. As a case study, experimentally determined reset, readout and photocurrent shot noise was used to determine the capacity of a differential active pixel sensor as a function of illumination level and integration time. Experimentally derived data show that the information rate is poor at both small and large integration times, with a maximum information rate occurring between these extremes. This maximum occurs at different integration times for different illumination levels and is used to determine the optimal integration time for the sensor.

In this paper, we describe a method for transient stochastic analysis and apply it to develop a stochastic model for a true random number generator (RNG) circuit using intrinsic circuit noise. We use numerical simulation of stochastic differential equations to obtain time-domain transient analysis of the circuit. The simulation shows similar stochastic behavior and probability tuning as that observed in measurements of the fabricated chips. We further develop a small signal stochastic model of the circuit. The model reveals the role each device plays in contributing to overall stochastic behavior. The model and the simulation allow us to predict how the device parameters affect the performance. The method we propose here can be applied to other circuits where stochastic sample paths and ensemble statistics are necessary to characterize the circuits. Traditional noise analysis in the frequency domain is not adequate to provide this information.

We report a compact realization of short-term depression (STD) in a VLSI stochastic synapse. The behavior of the circuit is based on a subtractive single release model of STD. Experimental results agree well with simulation and exhibit expected STD behavior: the transmitted spike train has negative autocorrelation and lower power spectral density at low frequencies which can remove redundancy in the input spike train, and the mean transmission probability is inversely proportional to the input spike rate which has been suggested as an automatic gain control mechanism in neural systems. The dynamic stochastic synapse could potentially be a powerful addition to existing deterministic VLSI spiking neural systems.

Integrated CMOS neural amplifiers have recently grown in importance as large microelectrode arrays have begun to be practical. We previously reported low-power neural amplifiers with integrated pre-filtering and measurements of the spike signal to reduce data bandwidth and to facilitate spike-sorting prior to transmission to a data-acquisition system. Characteristics of a prototype circuit were reported using a 1.5 V power supply, suitable for single cell battery operation. Here we report improved transient amplitude tracking as well as application of the circuit in live recordings of wide-field motion sensitive cells in blowflies. The features extracted by the chip efficiently discriminate between stimulus conditions, as demonstrated by receiver operating characteristic analysis.

We have investigated information transmission in operational transconductance amplifiers (OTA) using chopper modulation. Previous work showed that the optimal frequency bandwidth for an OTA was much higher than typical operating frequencies. Here we analyze the information transfer rates for a folded cascode amplifier and a chopper modulated folded cascode amplifier using the principles of information theory. The frequency transfer characteristic and intrinsic physical noise source of each device is modeled using process dependent noise parameters and the waterfilling technique is applied to determine the capacity as well as information rates for low frequency signals. Simulations are experimentally verified using circuits fabricated in a commercially available 3-metal, 2-poly 0.5μm CMOS process.

This paper reports a novel integrated circuit for fluorescence sensing. The circuit implements a differential readout architecture in order to reduce the overall noise figure. The circuit has been fabricated in a commercially available 0.5μm CMOS technology. Preliminary results show that the reset noise is reduced by a factor of 1.42 and the readout noise by a factor of 9.20 when the pixel is operated in differential mode versus single-ended mode. Spectral responsivity characteristics show that the photodiodes are most sensitive at 480 nm. Using a commercially available emission filter, the sensor was able to reliably detect a concentration of Fura-2 as low as 39 nM. The sensor was used to perform ratiometric measurements and was able to reliably detect a free calcium concentration of 17 nM.

The authors present theory, design and measurement results for an online histogram equalization algorithm implemented on a 750MS/s 6b flash analog to digital converter in standard 0.35μm CMOS. The user simply turns on "training mode" for a few seconds, while the algorithm automatically adjusts comparator levels to match the observed input signal distribution. This results in signal conversion with equal probability for each of the output codewords. The new architecture is an extension of a flash ADC incorporating an adaptive floating gate comparator and control circuits for automatic programming of the reference levels. Experiments show output codes with at least 5.9 bits entropy for ramp, sine and Gaussian random signals after adaptation. Uniform programming produces 5.7 ENOB for input frequencies up to 200MHz and maximum DNL and INL of 0.24 LSB and 0.79 LSB at Nyquist rate, while equalization produces 5.3 ENOB up to 600MHz.

We describe and analyze a novel CMOS pixel for high speed, low light imaging applications. The pixel achieves lower dark current and noise and increased gain in comparison with conventional three-transistor, one-photodiode active pixel sensors without sacrificing speed and scalability to large arrays. It accomplishes this by biasing the photodiode of each pixel near zero volts and by separating the photodiode from the floating diffusion integration node. An image sensor with a 256 /spl times/ 256 array of these pixels was designed for a commercially available 0.18 /spl mu/m CMOS technology. The pixel size is 5/spl mu/.m /spl times/ 5/spl mu/m with a fill factor of 31%. The chip area is 3000 /spl mu/m /spl times/ 3000/spl mu/m. 1.8 V and 3.3 V power supplies are used for logic and sensor array, respectively. Differential output and chip level correlated-double sampling are used to suppress fixed pattern noise. Transmission gates with dummy transistors are incorporated into the readout chain to reduce both clock feedthrough and charge injection.

We describe the design of a contact imager for applications in lab-on-a-chip systems, such as sample preparation and manipulation and monitoring of cells. This is a challenging task because most cells are nearly transparent, so the contrast between the presence and absence of a cell is small. Thus additional image processing is necessary to locate cells. To enhance the image contrast and facilitate object recognition, the contact imager implements on-chip one bit quantization with a dynamic threshold that adapts to the background illumination. The imager is capable of locating dark objects in a bright background or bright objects in a dark background. The locations of recognized cells are generated as outputs to alleviate computational requirements for generating control signals in closed-loop systems.

We describe a potentiostat designed for in situ electrochemical control of MEMS actuators. This module is tailored for integration into a hybrid CMOS-MEMS system-on-a-chip to confine cells and measure signals from them. The design has been fabricated in a commercially available 0.5 mum CMOS process. The fabricated chip has been employed for the control of off-chip electroactive polymer films and micro-actuators

We present a 1.5V low power CMOS temperature sensor for detection of on-chip temperature gradients. The temperature sensor has measured accuracy of+/- 0.25/spl deg/C over a temperature range from 25/spl deg/C to 97/spl deg/C. The power consumption of a single temperature sensor is 96nW and the layout occupies 64.8/spl mu/m/sup 2/ in a 0.5/spl mu/m CMOS technology. A chip with spatially non-uniform heat generation devices and an array of temperature sensors was fabricated and tested. Experimental results demonstrate that the sensors successfully detect the induced temperature gradient on the chip.

Performance on specific tasks in an organism's everyday activities is essential to survival. In this paper, we extend information-theoretic investigation of neural systems to task specific information using a detailed biophysical model of the blowfly photoreceptor. We formulate the response of the photoreceptor to incident flashes and determine the optimal detection performance using ideal observer analysis. Furthermore, we derive Fisher information contained in the output of the photoreceptor, and show how Fisher information is related to the detection performance. In addition we use Fisher information to show the connections between detection performance, signal-noise ratio, and discriminability. Our detailed biophysical model of the blowfly photoreceptor provides a rich framework for information-theoretic study of neural systems.

We outline a theoretical framework to analyze information processing in biological sensory organs and in engineered microsystems. We employ the mathematical tools of communication theory and model natural or synthetic physical structures as microscale communication networks, studying them under physical constraints at two different levels of abstraction. At the functional level, we examine the operational and task specification, while at the physical level, we examine the material specification and realization. Both levels of abstraction are characterized by Shannon's channel capacity, as determined by the channel bandwidth, the signal power, and the noise power. The link between the functional level and the physical level of abstraction is established through models for transformations on the signal, physical constraints on the system, and noise that degrades the signal. As a specific example, we present a comparative study of information capacity (in bits per second) versus energy cost of information (in joules per bit) in a biological and in a silicon adaptive photoreceptor. The communication channel model for each of the two systems is a cascade of linear bandlimiting sections followed by additive noise. We model the filters and the noise from first principles whenever possible and phenomenologically otherwise. The parameters for the blowfly model are determined from biophysical data available in the literature, and the parameters of the silicon model are determined from our experimental data. This comparative study is a first step toward a fundamental and quantitative understanding of the tradeoffs between system performance and associated costs such as size, reliability, and energy requirements for natural and engineered sensory microsystems.

We employ communication theory to analyze information processing in a silicon photoreceptor and in a biophysical model of the blowfly photoreceptor. We take channel capacity to be a quantitative measure of performance which is independent of any particular task. The physical instantiation of any channel determines the noise, the signal constraints and the channel capacity. The channel model for each of the two systems is a cascade of linear bandlimiting sections followed by additive noise. Filters and noise are modelled from first principles when possible. Parameters for the blowfly model are determined from biophysical data available in the literature. Such a comparative study is a first step towards understanding the performance, and the tradeoffs between system performance and associated costs such as size, reliability and energy requirements for natural and engineered sensory systems.

Photoreceptors measure and communicate information about visual stimuli to other neurons. In this process, the visual signal is converted between many different physical states. We present a communication channel model that describes transmission and degradation of the visual signal in the blowfly photoreceptor cell. The model is a cascade of linear systems and noise sources; these elements are derived from fundamental principles when possible, and parameters of the model are estimated from physiological data. We compute capacity and bit-energy using the model. Our results indicate that photon shot noise and channel noise are the dominant noise sources in blowfly phototransduction.

Our goal is to relate the structural and biophysical characteristics of blowfly visual neurons to their functional information processing aspects. Starting with the biophysics of information flow in the the early visual system of the blowfly, we construct a communication channel model that describes transmission and degradation of the visual signal in the photoreceptor and large monopolar cell. The channel model is a cascade of linear bandlimiting sections each followed by additive noise. Each section is modelled from first principles when possible, and parameters are determined from biophysical data available in the literature. The information capacity computed using our model compares favorably with empirical information rates derived from physiological experiments.