Patricia Balbastre Betoret

dblp:b/PatriciaBalbastre · also Patricia Balbastre · DBLP profile ↗
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22ranked-venue papers
7as first author
3since 2021 · last 2024
0000-0001-9458-4083ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 13 · 3 first-author · 3 since 2021Software engineering, systems software and programming languages · 2 · 1 first-author
YearPublicationVenuePosition
2024 Gradient descent algorithm for the optimization of fixed priorities in real-time systems
abstract
This paper considers the offline assignment of fixed priorities in partitioned preemptive real-time systems where tasks have precedence constraints. This problem is crucial in this type of systems, as having a good fixed priority assignment allows for an efficient use of the processing resources while meeting all the deadlines. In the literature, we can find several proposals to solve this problem, which offer varying trade-offs between the quality of their results and their computational complexities. In this paper, we propose a new approach, leveraging existing algorithms that are widely exploited in the field of Machine Learning: Gradient Descent, the Adam Optimizer, and Gradient Noise. We show how to adapt these algorithms to the problem of fixed priority assignment in conjunction with existing worst-case response time analyses. We demonstrate the performance of our proposal on synthetic task-sets with different sizes. This evaluation shows that our proposal is able to find more schedulable solutions than previous heuristics, approximating optimal but intractable algorithms such as MILP or brute-force, while requiring reasonable execution times.
Juan Maria Rivas, J. Javier Gutiérrez, Ana Guasque, Patricia Balbastre Betoret
J. Syst. Archit.4
2022 Schedulability analysis of dynamic priority real-time systems with contention
abstract
Abstract In multicore scheduling of hard real-time systems, there is a significant source of unpredictability due to the interference caused by the sharing of hardware resources. This paper deals with the schedulability analysis of multicore systems where the interference caused by the sharing of hardware resources is taken into account. We rely on a task model where this interference is integrated in a general way, without depending on a specific type of hardware resource. There are similar approaches but they consider fixed priorities. The schedulability analysis is provided for dynamic priorities assuming constrained deadlines and based on the demand bound function. We propose two techniques, one more pessimistic than the other but with a lower computational cost. We evaluate the two proposals for different task allocators in terms of the increased estimated utilization. The results show that both bounds are valid for ensuring schedulability although, as expected, one is tighter than the other. The evaluation also serves to compare allocators to see which one produces less interference.
Ana Guasque, José María Aceituno, Patricia Balbastre Betoret, José-Enrique Simó-Ten, Alfons Crespo
J. Supercomput.3
2021 Hardware resources contention-aware scheduling of hard real-time multiprocessor systems
abstract
In hard real-time embedded systems, switching to multicores is a step that most application domains delay as much as possible. This is mainly due to the number of sources of indeterminism, which mainly involve shared hardware resources, such as buses, caches, and memories. In this paper, a new task model that considers the interference that task execution causes in other tasks running on other cores due to memory contention is proposed. We propose a scheduling algorithm that calculates the exact interference. We also analyse and compare existing partitioning algorithms and propose three strategies to allocate tasks to cores to schedule as many tasks as possible and minimise total interference.
José María Aceituno, Ana Guasque, Patricia Balbastre Betoret, José-Enrique Simó-Ten, Alfons Crespo
J. Syst. Archit.3
2019 HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions
abstract
Heterogeneous parallel devices are becoming widely diffused in the embedded systems application field since they allow to improve time performances and other orthogonal metrics (e.g., cost, power, size, etc.) at the same time. In such a context, the introduction of safety requirements, as dictated by the relevant standards (i.e., DO-178 B/C and RTCA/DO-254 in airborne systems, ARINC 653 for avionics software, ISO-26262 in automotive domain, etc.) while considering shared resources on a heterogeneous parallel HW platform, adds further challenges to industrial and academic research. This kind of platforms that execute tasks with different levels of criticality are commonly called mixed-criticality embedded systems. So, the main problem in their management is to ensure that low criticality tasks do not interfere with high criticality ones. The final goal is to allow several applications to interact and coexist on the same platform. For this, the exploitation of virtualization technologies (i.e., hypervisors) allows to guarantee isolation and to satisfy certification requirements but introduces scheduling overhead and new HW/SW partitioning challenges. In such a scenario, this work focuses on a framework for modeling, analysis, and validation of mixed-criticality and real-time systems based on an existing "Model-Based Electronic System Level HW/SW Co-Design" methodology. The main contribution of this work is the integration of the considered framework with Xamber tool in order to provide systems implementations by exploiting a design space exploration able to consider Xtratum-based SW partitions.
Vittoriano Muttillo, Luigi Pomante, Patricia Balbastre Betoret, José-Enrique Simó-Ten, Alfons Crespo
DSD3
2019 Design of Criticality-Aware Scheduling for Advanced Driver Assistance Systems
abstract
Demand for Advanced Driver Assistance Systems (ADAS) is growing larger with the key focus of increased road safety, driver comfort and the futuristic autonomous vehicles. ADAS is typically a mixed-criticality system (MCS) with interdependent tasks which change their criticality level with the dynamic changes in the environment. In an MCS, the timing of safety-critical tasks must be strictly guaranteed to prevent accidents. From the conventional scheduling techniques in ADAS, more challenge is involved in meeting the timing performance of task scheduling and resource sharing while ADAS as MCS. This is a work-in-progress paper. Its objective is the design of ADAS with multicore partitioned architecture on the Xtratum hypervisor with the improved load and resource sharing among the subsystems. This is to address the dynamic changes in criticality and later to reduce the make-span for high critical tasks so as to prevent accidents. Two safety-critical ADAS subsystems Forward Collision Avoidance System (FCAS) and Blind Spot Avoidance System (BSAS) help to illustrate the architecture in this paper.
J. Savithry, Ana Guasque, Anju S. Pillai, Patricia Balbastre Betoret, Alfons Crespo
ETFA4
2018 A Hypervisor Architecture for Low-Power Real-Time Embedded Systems
abstract
This paper presents a hypervisor architecture tailored to low-power real-time applications. This architecture extends the capability of a hypervisor by providing power management techniques and power monitoring services. An implementation based on an existing hypervisor XtratuM that runs over the ARM of a Zynq-7000 SoC device is proposed as a proof of concept. Measurement results show that the extended hypervisor can obtain information on the power consumption and reduce it.
Tomaso Poggi, Peio Onaindia, Mikel Azkarate-askatsua, Kim Grüttner, Maher Fakih, Salvador Peiro Frasquet, Patricia Balbastre Betoret
DSD7
2018 Energy Characterization of Real-Time Partitioned Systems
abstract
This paper addresses the problem of energy characterization in partitioned systems. The goal is to use this model to minimize energy consumption. Controlling the frequency at which CPUs can operate is a common technique to reduce the system energy consumption. Techniques as DVFS assume that decreasing the system frequency decreases the system energy, in spite of increasing the time the processor is busy. This relationship between temporal load, frequency and energy is studied in this paper. All works assume that this relationship is linear but we provide a new energy model that relates the previous variables through a non-linear relation. We also present a comparison in terms of energy between the linear and the non-linear model.
Ana Guasque, Patricia Balbastre Betoret, Alfons Crespo, Gerhard Fohler
RTCSA2
2016 Real-time hierarchical systems with arbitrary scheduling at global level
Ana Guasque, Patricia Balbastre Betoret, Alfons Crespo
J. Syst. Softw.2
2011 Task period selection to minimize hyperperiod
abstract
In this paper a new task model with periods defined as ranges is proposed with the main goal of drastically reduce the hyperperiod of the task set. The model is focused to be applied in cyclic scheduling, where the length of the major cycle of the plan is determined by the hyperperiod. But it also can be applied in synthetic task sets generation, where having a small hyperperiod reduces complexity and simulation time. A new algorithm, which allows to calculate the minimum hyperperiod of such a set of tasks, is presented. This algorithm calculates the minimum value even with a large number of tasks, where exhaustive search becomes intractable.
Vicent Brocal, Patricia Balbastre Betoret, Rafael Ballester-Ripoll, Ismael Ripoll
ETFA2
2010 Design procedure to minimize power consumption and delays in WSAN
abstract
Current trends in the development of industrial applications enforce the use of wireless networks to communicate the system nodes mainly to increase flexibility and reliability of these applications and to reduce the implementation cost. However, in control applications, as consequence of the latency and jitter generated by the network, not always the results achieved by the experimental results and desired performance are coherent. This is due to the imprecise models for system analysis and design used and the non appropriated validation methods and platforms to support these models. Therefore this paper presents a method to achieve an optimal system configuration in order to fulfil the desired performance in control applications with a significant energy saving and minimum delay.
Patricia Balbastre Betoret, Francisco Blanes, José-Enrique Simó-Ten, Alfons Crespo
ETFA2
2009 Exact Response Time Analysis of Hierarchical Fixed-Priority Scheduling
abstract
Hierarchical scheduling has recently been used to provide temporal isolation to embedded virtualised systems. Response time analysis is a common way to derive a schedulability test for these systems. This paper points out that response time analysis for hierarchical fixed-priority scheduling found in the literature is only exact for tasks of the highest priority domain. For the rest of the tasks is an upper bound. In our work, we provide the exact analysis and we compare it with previously published works.
Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
RTCSA1
2009 Period sensitivity analysis and D-P domain feasibility region in dynamic priority systems
Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
J. Syst. Softw.1
2008 Providing Memory QoS Guarantees for Real-Time Applications
abstract
Nowadays, systems often integrate a variety of applications whose service requirements are heterogeneous. Consequently, systems must be able to concurrently serve applications which rely on different constraints. This raises the problem of the dynamic distribution of the system resources (CPU, memory, network, etc.). Therefore, an integrated Quality of Service (QoS) management is needed so as to efficiently assign resources according to the various application demands. Within this paper, we focus on a dynamic approach of QoS management for memory resource allocation based on the Skip-Over model. We detail our solution and we show how it improves the service of task memory requests while providing them guarantees. Quantitative results using the TLSF allocator have been performed in order to evaluate the memory failure probability with and without memory QoS manager.
Audrey Marchand, Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
RTCSA2
2008 A constant-time dynamic storage allocator for real-time systems
Miguel Masmano, Ismael Ripoll, Patricia Balbastre Betoret, Alfons Crespo
Real Time Syst.3
2008 Minimum Deadline Calculation for Periodic Real-Time Tasks in Dynamic Priority Systems
abstract
Real-time systems are often designed using a set of periodic tasks. Task periods are usually set by the system requirements, but deadlines and computation times can be modified in order to improve system performance. Sensitivity analysis in real-time systems has focused on changes in task computation times using fixed priority analysis. Only a few studies deal with the modification of deadlines in dynamic-priority scheduling. The aim of this work is to provide a sensitivity analysis for task deadlines in the context of dynamic-priority, preemptive, uniprocessor scheduling. In this paper, we present a deadline minimization method that computes the shortest deadline of a periodic task. As undertaken in other studies concerning computation times, we also define and calculate the critical scaling factor for task deadlines. Our proposal is evaluated and compared with other works. The deadline minimization proposed strongly reduces jitter and the response time of control tasks, which can lead to a significant improvement in system performance.
Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
IEEE Trans. Computers1
2007 Memory Resource Management for Real-Time Systems
abstract
Dynamic memory storage has been widely used for years in computer science. However, its use in real-time systems has not been considered as an important issue, and memory management has not receive much consideration, whereas today's real-time applications are often characterized by highly fluctuating memory requirements. In this paper we present an approach to dynamic memory management for real-time systems. In response to application behavior and requests, the underlying memory management system adjusts resources to meet changing demands and user needs. The architectural framework that realizes this approach allows adaptive allocation of memory resources to applications involving both periodic or aperiodic tasks. Simulation results demonstrate the suitability of the proposed mechanism.
Audrey Marchand, Patricia Balbastre Betoret, Ismael Ripoll, Miguel Masmano, Alfons Crespo
ECRTS2
2007 Analysis of window-constrained execution time systems
Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
Real Time Syst.1
2006 Optimal deadline assignment for periodic real-time tasks in dynamic priority systems
abstract
Real-time systems are often designed using a set of periodic tasks. Task periods are usually set by the system requirements, but deadlines and computation times can be modified in order to improve system performance. Sensitivity analysis in real-time systems has focused on changes in task computation times using fixed priority analysis. Only a few studies deal with the modification of deadlines in dynamic priority scheduling. The aim of this work is to provide a sensitivity analysis for task deadlines in the context of dynamic-priority, pre-emptive, uniprocessor scheduling. In this paper, we present a deadline minimisation method that achieves the maximum reduction. As undertaken in other studies concerning computation times, we also define and calculate the critical scaling factor for task deadlines. Our proposal is evaluated and compared with other works in terms of jitter. The deadline minimisation can be used to strongly reduce jitter of control tasks, in a real-time control application
Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
ECRTS1
2006 Jitter Evaluation of Real-Time Control Systems
abstract
The real-time implementation of a controller typically introduces artefacts like delay and jitters that have not been considered at the design stage. As a consequence, the system behaves in a non-periodic manner, and the real performance is degraded with respect to the expected response. This paper proposes a hybrid task model to reduce the impact of the scheduling on the control performance. For a large batch of typical plants, we analyze how sensitive the control system is to jitter when the sampling rate is slow or fast compared to the bandwidth of the system
Manuel Lluesma, Anton Cervin, Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
RTCSA3
2004 IRIS: A New Reclaiming Algorithm for Server-Based Real-Time Systems
abstract
In this paper we present a new algorithm for CPU resource reservation in real-time systems that allows the coexistence of hard, soft and non real-time tasks. The proposed algorithm is specifically designed to handle computational overload. A task that needs more CPU-time than reserved can reuse the spare bandwidth, without interfering with the others tasks. With respect to other reclamation schemes, the novelty of the proposed algorithm is that the spare bandwidth is fairly distributed among the needing servers. The effectiveness of the algorithm is demonstrated with an extensive set of experiments. We also propose a methodology to set scheduling parameters depending on the type of the task and on the time constraints needed.
Luca Marzario, Giuseppe Lipari, Patricia Balbastre Betoret, Alfons Crespo
IEEE Real-Time and Embedded Technology and Applications Symposium3
2004 A Task Model to Reduce Control Delays
Patricia Balbastre Betoret, Ismael Ripoll, Josep Vidal Canet, Alfons Crespo
Real Time Syst.1
2002 Schedulability Analysis of Window-Constrained Execution Time Tasks for Real-Time Control
abstract
Feasibility tests for hard real-time systems provide information about the schedulability of a set of tasks. However, this information is a yes or no answer whether the task set achieves the test or not. From the system design point of view, it would be useful to have more information, for example, how much can one vary some task parameters, such as computation time, without jeopardizing the system feasibility. The aim of the work is to provide a method to determine how much a task can increase its computation time, maintaining the system feasibility under a dynamic priority scheduling. This extra time can be determined not only in all the task activations, but in n of a window of m task invocations. This is what we call a window-constrained execution time system. In control applications, this information can be used to execute supervision activities, such as model updating which is not required to be executed in all the periods, or to determine new controller parameters for the current operating conditions. In fault tolerance, this information allows us to recover n faults in m activations.
Patricia Balbastre Betoret, Ismael Ripoll, Alfons Crespo
ECRTS1