Giovanni Chiola

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28ranked-venue papers
14as first author
0since 2021 · last 2019
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 16 · 10 first-authorSoftware engineering, systems software and programming languages · 7 · 1 first-authorComputer networks · 3Theory of computation · 2 · 2 first-authorArtificial intelligence and machine learning · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
8 papers
Performance modeling and evaluation · 90% Processor architecture and microarchitecture · 6% Parallel and multicore computing · 3%
Software engineering, system software, and programming languages
2 papers
Concurrent programming · 89% Program verification · 11%

Topics — the 14 heaviest of 19, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Performance modeling and evaluation
stochastic petri nets
0.061993
Generalized Stochastic Petri Nets: A Definition at the Net Level and Its Implications · IEEE Trans. Software Eng. 1993
Stochastic Well-Formed Colored Nets and Symmetric Modeling Applications · IEEE Trans. Computers 1993
An Example of Modeling and Evaluation of a Concurrent Program Using Colored Stochastic Petri Nets: Lamport's Fast Mutual Exclusion Algorithm · IEEE Trans. Parallel Distributed Syst. 1992
Performance modeling and evaluation › stochastic petri nets
generalized stochastic petri nets
0.021993
Generalized Stochastic Petri Nets: A Definition at the Net Level and Its Implications · IEEE Trans. Software Eng. 1993
Modeling the Software Architecture of a Prototype Parallel Machine · SIGMETRICS 1987
Performance modeling and evaluation
queueing models
0.021988
Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References · IEEE Trans. Computers 1988
Generalized stochastic Petri nets for the performance evaluation of FMS · ICRA 1987
Concurrent programming › synchronization
mutual exclusion
0.011992
An Example of Modeling and Evaluation of a Concurrent Program Using Colored Stochastic Petri Nets: Lamport's Fast Mutual Exclusion Algorithm · IEEE Trans. Parallel Distributed Syst. 1992
Performance modeling and evaluation › queueing models
queueing network model
0.011991
Ergodicity and Throughput Bounds of Petri Nets with Unique Consistent Firing Count Vector · IEEE Trans. Software Eng. 1991
Performance modeling and evaluation › performance model construction › throughput modeling
throughput bounds
0.011991
Ergodicity and Throughput Bounds of Petri Nets with Unique Consistent Firing Count Vector · IEEE Trans. Software Eng. 1991
Processor architecture and microarchitecture › multiprocessor architecture
bus-based multiprocessor
0.011988
Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References · IEEE Trans. Computers 1988
Performance modeling and evaluation › parallel system performance
multiprocessor performance evaluation
0.011988
Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References · IEEE Trans. Computers 1988
Performance modeling and evaluation › queueing models › product-form queueing networks
product-form solution
0.011988
Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References · IEEE Trans. Computers 1988
Processor architecture and microarchitecture
multiprocessor architecture
0.011993
Stochastic Well-Formed Colored Nets and Symmetric Modeling Applications · IEEE Trans. Computers 1993
Performance modeling and evaluation › markov models
markovian analysis
0.011992
An Example of Modeling and Evaluation of a Concurrent Program Using Colored Stochastic Petri Nets: Lamport's Fast Mutual Exclusion Algorithm · IEEE Trans. Parallel Distributed Syst. 1992
Mathematical optimization
linear programming
0.011991
Ergodicity and Throughput Bounds of Petri Nets with Unique Consistent Firing Count Vector · IEEE Trans. Software Eng. 1991
Performance modeling and evaluation
manufacturing scheduling
0.011987
Generalized stochastic Petri nets for the performance evaluation of FMS · ICRA 1987
Performance modeling and evaluation › performance prediction
throughput prediction
0.011987
Modeling the Software Architecture of a Prototype Parallel Machine · SIGMETRICS 1987

Methods — techniques the papers use, named apart from their topics

markovian analysis · 0.0colored generalized stochastic petri nets · 0.0linear programming · 0.0incidence matrix · 0.0structural analysis · 0.0reachability analysis · 0.0markov chain analysis · 0.0validation · 0.0race policy · 0.0preselection policy · 0.0phase-type distribution · 0.0evaluation · 0.0
YearPublicationVenuePosition
2019 Introducing the SlowDrop Attack
abstract
In network security, Denial of Service (DoS) attacks target network systems with the aim of making them unreachable. Last generation threats are particularly dangerous because they can be carried out with very low resource consumption by the attacker. In this paper we propose SlowDrop, an attack characterized by a legitimate-like behavior and able to target different protocols and server systems. The proposed attack is the first slow DoS threat targeting Microsoft IIS, until now unexploited from other similar attacks. We properly describe the attack, analyzing its ability to target arbitrary systems on different scenarios, by including both wired and wireless connections, and comparing the proposed attack to similar threats. The obtained results show that by executing targeted attacks, SlowDrop is successful both against conventional servers and Microsoft IIS, which is closed source and required us the execution of so called “network level reverse engineering” activities. Due to its ability to successfully target different servers on different scenarios, the attack should be considered an important achievement in the slow DoS field.
Enrico Cambiaso, Giovanni Chiola, Maurizio Aiello
Comput. Networks2
2010 On the Integrity of Network Coding-Based Anonymous P2P File Sharing Networks
abstract
Network coding is a class of routing algorithms offering increased throughput and improved robustness to random failures. With traditional routing, intermediate nodes in the network may only forward unmodified packets. With network coding, instead, intermediate nodes are allowed to forward linear combinations of received packets. Original data can be reconstructed after collecting sufficiently many linear combinations. Current file sharing systems offer either low overhead and high bandwidth with no privacy, or acceptable privacy at very low speed. Thanks to network coding, a general-purpose P2P network can obtain a privacy/performance tradeoff that may be considered reasonable in most real-world scenarios. In this paper we present an integrity strategy for network coding-based P2P anonymous systems, specifically designed to preserve the anonymity of peers. Our approach is significantly easier to implement than current solutions when anonymity is required. We implement the cryptographic algorithms on which our method is based and provide performance figures. We also define verification strategies which use batching for improved performances together with an efficiency analysis.
Paolo Gasti, Alessio Merlo, Giuseppe Ciaccio, Giovanni Chiola
NCA4
2009 StemCerts-2: Pairs of X.509 v3 Certificates for Greater Security, Flexibility and Convenience
abstract
We introduce the notion of StemCerts, a digital certificate scheme that allows the user to modify some fields of a digital certificate while keeping it valid. The owner can modify a StemCert in a limited and controlled fashion without interacting with the certification authority which issued it. By modifying her identity, the user can achieve "pseudonymous anonymity" - but the CA can still associate a certificate to its owner - and/or handle temporary or permanent address changes. Modifying the expiry date allows the user to transform her certificate into a set of "one time" certificates, thus alleviating the need for revocation lists. We developed two proof-of-concept implementations for this new scheme. The first one was based on Chameleon hash functions, while the second one was based on the use of two chained, standard X.509 v3 certificates. We also present experimental data collected from the prototype implementations that show how the second prototype can easily be adopted in real environments, possibly exploiting smartcard technology.
Giovanni Chiola, Paolo Gasti
CCNC1
2009 Degree-Optimal Routing for P2P Systems
Giovanni Chiola, Gennaro Cordasco, Luisa Gargano, Mikael Hammar, Alberto Negro, Vittorio Scarano
Theory Comput. Syst.1
2008 Neighbor-of-neighbor routing over deterministically modulated Chord-like DHTs
abstract
We define a DHT system whose aim is to combine the routing efficiency typical of randomized networks, i.e. average path length O(logn/ log log n), with the ease of coding and the start-up efficiency of an optimized uniform system. Our proposed system is non-uniform, even though it is not explicitly randomized. In particular, the difference in terms of finger tables between two adjacent peers in a large system is very moderate, and predictable based on an approximation of the peers' keys. These characteristics allow us to adopt a (multi-hop) Neighbor of Neighbor routing algorithm, which asymptotically achieves O(logn/ log logn) average path length, and that in practice may even slightly outperform randomized networks containing more than 100,000 peers.
Giovanni Chiola, Marina Ribaudo
IPDPS1
2008 Optimizing the finger tables in Chord-like DHTs
abstract
Abstract The Chord protocol is the best known example of implementation of logarithmic complexity routing for structured peer‐to‐peer networks. Its routing algorithm, however, does not provide an optimal trade‐off between resources exploited (the size of the ‘finger table’) and performance (the average or worst‐case number of hops to reach destination). Cordasco et al. showed that a finger table based on Fibonacci distances provides lower number of hops with fewer table entries. In this paper we generalize this result, showing how to construct an improved finger table when the objective is to reduce the number of hops, possibly at the expense of an increased size of the finger table. Our results can also be exploited to guarantee low routing time in case a fraction of nodes fails. Copyright © 2007 John Wiley & Sons, Ltd.
Giovanni Chiola, Gennaro Cordasco, Luisa Gargano, Alberto Negro, Vittorio Scarano
Concurr. Comput. Pract. Exp.1
2006 Optimizing the finger table in chord-like DHTs
abstract
The chord protocol is the best known example of implementation of logarithmic complexity routing for structured peer-to-peer networks. Its routing algorithm, however, does not provide an optimal trade-off between resources exploited (the size of the "finger table") and performance (the average or worst-case number of hops to reach destination). Cordasco et al. showed that a finger table based on Fibonacci distances provides lower number of hops with fewer table entries. In this paper, we generalize this result, showing how to construct an improved finger table when the objective is to reduce the number of hops, possibly at the expense of an increased size of the finger table. Our results can also be exploited to guarantee low routing time in case a fraction of nodes is assumed to fail.
Giovanni Chiola, Gennaro Cordasco, Luisa Gargano, Alberto Negro, Vittorio Scarano
IPDPS1
2003 Using a Gigabit Ethernet Cluster as a Distributed Disk Array with Multiple Fault Tolerance
abstract
A cluster of PCs can be seen as a collection of networked low cost disks; such a collection can be operated by proper software so as to provide the abstraction of a single, larger block device. By adding suitable data redundancy, such a disk collection as a whole could act as single, highly fault tolerant, distributed RAID device, providing capacity and reliability along with the convenient price/performance typical of commodity clusters. We report about the design and performance of DRAID, a distributed RAID prototype running on a Gigabit Ethernet cluster of PCs. DRAID offers storage services under a single I/O space (SIOS) block device abstraction. The SIOS feature implies that the storage space is accessible by each of the stations in the cluster, rather than throughout one or few end-points, with a potentially higher aggregate I/O bandwidth and better suitability to parallel I/O.
Alessandro Di Marco, Giovanni Chiola, Giuseppe Ciaccio
LCN2
2001 Topic 09: Distributed Systems and Algorithms
Bertil Folliot, Giovanni Chiola, Peter Druschel, Anne-Marie Kermarrec
Euro-Par2
2001 Combining Structural and Enumerative Techniques for the Validation of Bounded Petri Nets
Rubén Carvajal-Schiaffino, Giorgio Delzanno, Giovanni Chiola
TACAS3
2000 Low-cost Gigabit Ethernet at Work
Giuseppe Ciaccio, Giovanni Chiola
CLUSTER2
2000 Efficient parallel processing on low-cost clusters with GAMMA active ports
Giovanni Chiola, Giuseppe Ciaccio
Parallel Comput.1
1998 Active Ports: A Performance-Oriented Operating System Support to Fast LAN Communications
Giovanni Chiola, Giuseppe Ciaccio
Euro-Par1
1997 Implementing a Low Cost, Low Latency Parallel Platform
Giovanni Chiola, Giuseppe Ciaccio
Parallel Comput.1
1997 A Symbolic Reachability Graph for Coloured Petri Nets
Giovanni Chiola, Claude Dutheillet, Giuliana Franceschinis, Serge Haddad
Theor. Comput. Sci.1
1995 GreatSPN 1.7: Graphical Editor and Analyzer for Timed and Stochastic Petri Nets
Giovanni Chiola, Giuliana Franceschinis, Rossano Gaeta, Marina Ribaudo
Perform. Evaluation1
1993 Stochastic Well-Formed Colored Nets and Symmetric Modeling Applications
abstract
The class of stochastic well-formed colored nets (SWN's) was defined as a syntactic restriction of stochastic high-level nets. The interest of the introduction of restrictions in the model definition is the possibility of exploiting the symbolic reachability graph (SRG) to reduce the complexity of Markovian performance evaluation with respect to classical Petri net techniques. It turns out that SWN's allow the representation of any color function in a structured form, so that any unconstrained high-level net can be transformed into a well-formed net. Moreover, most constructs useful for the modeling of distributed computer systems and architectures directly match the "well-formed" restriction, without any need of transformation. A nontrivial example of the usefulness of the technique in the performance modeling and evaluation of multiprocessor architectures is included.>
Giovanni Chiola, Claude Dutheillet, Giuliana Franceschinis, Serge Haddad
IEEE Trans. Computers1
1993 Generalized Stochastic Petri Nets: A Definition at the Net Level and Its Implications
abstract
The class of Petri nets obtained by eliminating timing from generalized stochastic Petri net (GSPN) models while preserving the qualitative behavior is identified. Structural results for those nets are derived, obtaining the first structural analysis of Petri nets with priority and inhibitor arcs. A revision of the GSPN definition based on the structural properties of the models is presented. It is shown that for a (wide) class of nets, the definition of firing probabilities of conflicting immediate transitions does not require the information on reachable markings. Identification of the class of models for which the net-level specification is possible is also based on the structural analysis results. The procedure for the model specification is illustrated by means of an example. It is also shown that a net-level specification of the model associated with efficient structural analysis techniques can have a substantial impact on model analysis.>
Giovanni Chiola, Marco Ajmone Marsan, Gianfranco Balbo, Gianni Conte
IEEE Trans. Software Eng.1
1992 Petri Net Modelling of Parallel Computers - Guest Editor's Introduction
Giovanni Chiola
J. Parallel Distributed Comput.1
1992 An Example of Modeling and Evaluation of a Concurrent Program Using Colored Stochastic Petri Nets: Lamport's Fast Mutual Exclusion Algorithm
abstract
A colored generalized stochastic Petri net (CGSPN) model was used to study the correctness and performance of the Lamport concurrent algorithm to solve the mutual exclusion problem on machines lacking an atomic test and set instruction. In particular, a parametric formal proof of liveness is developed based on the structure and initial state of the model. The performance evaluation is based on a Markovian analysis that exploits the symmetries of the model to reduce the cost of the numerical solution. Both kinds of analysis are supported by efficient algorithms. The potential of the GSPN modeling technique is illustrated on an academic but nontrivial example of an application from distributed systems.>
Gianfranco Balbo, Giovanni Chiola, Steven C. Bruell, Pozung Chen
IEEE Trans. Parallel Distributed Syst.2
1991 Ergodicity and Throughput Bounds of Petri Nets with Unique Consistent Firing Count Vector
abstract
Ergodicity and throughput bound characterization are addressed for a subclass of timed and stochastic Petri nets, interleaving qualitative and quantitative theories. The nets considered represent an extension of the well-known subclass of marked graphs, defined as having a unique consistent firing count vector, independently of the stochastic interpretation of the net model. In particular, persistent and mono-T-semiflow net subclasses are considered. Upper and lower throughput bounds are computed using linear programming problems defined on the incidence matrix of the underlying net. The bounds proposed depend on the initial marking and the mean values of the delays but not on the probability distributions (thus including both the deterministic and the stochastic cases). From a different perspective, the considered subclasses of synchronized queuing networks; thus, the proposed bounds can be applied to these networks.>
Javier Campos, Giovanni Chiola, Manuel Silva 0001
IEEE Trans. Software Eng.2
1989 An Example of Validation and Evaluation ofa Concurrent Program: Lamport's Fast Mutual Exclusion Algorithm
Gianfranco Balbo, Giovanni Chiola, Steven C. Bruell, Pozung Chen
SIGMETRICS2
1989 The Effect of Execution Policies on the Semantics and Analysis of Stochastic Petri Nets
abstract
Petri nets in which random delays are associated with atomic transitions are defined in a comprehensive framework that contains most of the models already proposed in the literature. To include generally distributed firing times into the model one must specify the way in which the next transition to fire is chosen, and how the model keeps track of its past history; this set of specifications is called an execution policy. A discussion is presented of the impact that different execution policies have on semantics of the mode, as well as the characteristics of the stochastic process associated with each of these policies. When the execution policy is completely specified by the transition with the minimum delay (race policy) and the firing distributions are of the phase type, an algorithm is provided that automatically converts the stochastic process into a continuous time homogeneous Markov chain. An execution policy based on the choice of the next transition to fire independently of the associated delay (preselection policy) is introduced, and its semantics is discussed together with possible implementation strategies.>
Marco Ajmone Marsan, Gianfranco Balbo, Andrea Bobbio, Giovanni Chiola, Gianni Conte, Aldo Cumani
IEEE Trans. Software Eng.4
1988 Product-Form Solution Techniques for the Performance Analysis of Multiple-Bus Multiprocessor Systems with Nonuniform Memory References
abstract
Recursive relations are derived for the exact computation of the steady-state probability distribution of some queuing models with passive resources that can be used to analyze the performance of multiple-bus multiprocessor system architectures. The most general case that can be shown to admit a product-form solution is described, and a recursive solution is obtained taking into account, considering different processor access rates, different memory selection probabilities, and a first-come-first-served bus scheduling policy. Several simpler cases allowing easier model solutions are also considered. Numerical evaluations for large computing systems with nonuniform memory references show the usefulness of the results.>
Giovanni Chiola, Marco Ajmone Marsan, Gianfranco Balbo
IEEE Trans. Computers1
1987 Generalized stochastic Petri nets for the performance evaluation of FMS
abstract
A class of Petri nets in which transitions can fire either immediately or after an exponentially distributed random time since their enabling (GSPN), is used to define performance models for Flexible Manufacturing Systems. An example is discussed in which the analysis of the GSPN model yields results that are more reliable than those obtained with a currently used method based on queueing networks. Detailed GSPN models are shown that allow accurate analyses of the effects that different scheduling policies and pallet mixes have on system performance.
Gianfranco Balbo, Giovanni Chiola, Giuliana Franceschinis, G. Molinar Roet
ICRA2
1987 Modeling the Software Architecture of a Prototype Parallel Machine
abstract
A high-level Petri net model of the software architecture of an experimental MIMD multiprocessor system for Artificial Intelligence applications is derived by direct translation of the code corresponding to the assumed workload. Hardware architectural constraints are then easily added, and formal reduction rules are used to simplify the model, which is then further approximated to obtain a performance model of the system based on generalized stochastic Petri nets. From the latter model it is possible to estimate the optimal multiprogramming level of each processor so as to achieve the maximum performance in terms of overall throughput (number of tasks completed per unit time).
Marco Ajmone Marsan, Gianfranco Balbo, Giovanni Chiola, Gianni Conte
SIGMETRICS3
1987 Timed Petri net model for the accurate performance analysis of CSMA/CD bus LANs
Marco Ajmone Marsan, Giovanni Chiola, Andrea Fumagalli
Comput. Commun.2
1986 On the product-form solution of a class of multiple-bus multiprocessor system models
Marco Ajmone Marsan, Gianfranco Balbo, Giovanni Chiola, Susanna Donatelli
J. Syst. Softw.3