S. Krishna 0004

dblp:k/SNKrishna · also Shankara Narayanan Krishna, Shankaranarayanan Krishna · DBLP profile ↗
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95ranked-venue papers
30as first author
34since 2021 · last 2026
0000-0003-0925-398XORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Theory of computation · 71 · 24 first-author · 20 since 2021Software engineering, systems software and programming languages · 25 · 4 first-author · 16 since 2021Artificial intelligence and machine learning · 7 · 2 first-author · 2 since 2021Systems, architecture and hardware · 2 · 2 first-author · 1 since 2021Applied, interdisciplinary, general and emerging computing · 2 · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021
YearPublicationVenuePosition
2026 Complexity of Consistency Testing for the Release-Acquire Semantics
abstract
Abstract In a seminal work, Gibbons and Korach [9] studied the complexity of deciding whether an observed sequence of reads and writes of a multi-threaded program admits a sequentially consistent interleaving. They showed the problem to be $$\textsf{NP}$$ NP -hard even under strong syntactic restrictions. More recently, Chakraborty et al. [6] considered the problem for weak memory models and proved that $$\textsf{NP}$$ NP -hardness remains even when the number of threads, the number of memory locations, and the value domain are all bounded. In this paper we revisit the problem for the release-acquire variants of the C11 memory model. Our main positive result is that consistency testing can be done in polynomial-time when each memory location is written by at most one thread (multiple readers are allowed). Notably, this restriction is already $$\textsf{NP}$$ NP -hard for the model of sequential consistency. We complement our upper bound with tight hardness results: we show the problem to be $$\textsf{NP}$$ NP -hard when two threads may write to the same location; furthermore, allowing three writers per location rules out $$2^{o(k)}\cdot n^{\mathcal {O}(1)}$$ 2 o ( k ) · n O ( 1 ) algorithms under the Exponential Time Hypothesis, where k denotes the number of threads, and n the number of memory operations.
R. Govind 0001, S. Krishna 0004, Sanchari Sil, B. Srivathsan
FM (2)2
2026 MightyPPL: Model Checking MITL with Past and Pnueli Modalities
abstract
Metric Interval Temporal Logic ( $$\textsf {MITL} $$ ) is a popular formalism for specifying properties of reactive systems with timing constraints. Existing approaches to using $$\textsf {MITL} $$ in verification tasks, however, have notable drawbacks: they either support only limited fragments of the logic (the future only fragment $$\textsf {MITL} [\textsf{Fut}]$$ ) or allow for only incomplete verification. This paper introduces $$\textsc {MightyPPL} $$ , a new tool for translating formulae in Metric Interval Temporal Logic with Past and Pnueli modalities ( $$\textsf {MITPPL} $$ ) over the pointwise semantics into timed automata, enabling satisfiability and model checking of this expressive specification logic over both finite and infinite timed words. $$\textsc {MightyPPL} $$ optimises performance via specialised constructions for simple cases, a novel symbolic transition encoding, and a symmetry reduction technique that yields an exponential improvement in reachable discrete states. The tool generates language-equivalent automata compatible with back-ends such as Uppaal, TChecker, and LTSmin. Our evaluation demonstrates that $$\textsc {MightyPPL} $$ significantly outperforms the state-of-the-art tool $$\textsc {MightyL} $$ on future-only fragments and across various benchmarks.
Hsi-Ming Ho, S. Krishna 0004, Khushraj Madnani, Rupak Majumdar, Paritosh K. Pandya
TACAS (1)2
2025 sfGPUMC: A Stateless Model Checker for GPU Weak Memory Concurrency
abstract
Abstract GPU computing is embracing weak memory concurrency for performance improvement. However, compared to CPUs, modern GPUs provide more fine-grained concurrency features such as scopes, have additional properties like divergence, and thereby follow different weak memory consistency models. These features and properties make concurrent programming on GPUs more complex and error-prone. To this end, we present $$\textsf{GPUMC}$$ GPUMC , a stateless model checker to check the correctness of GPU shared-memory concurrent programs under scoped-RC11 weak memory concurrency model. $$\textsf{GPUMC}$$ GPUMC explores all possible executions in GPU programs to reveal various errors - races, barrier divergence, and assertion violations. In addition, $$\textsf{GPUMC}$$ GPUMC also automatically repairs these errors in the appropriate cases. We evaluate $$\textsf{GPUMC}$$ GPUMC on benchmarks and real-life GPU programs. $$\textsf{GPUMC}$$ GPUMC is efficient both in time and memory in verifying large GPU programs where state-of-the-art tools are timed out. In addition, $$\textsf{GPUMC}$$ GPUMC identifies all known errors in these benchmarks compared to the state-of-the-art tools.
Soham Chakraborty 0001, S. Krishna 0004, Andreas Pavlogiannis, Omkar Tuppe
CAV (3)2
2025 Reversible Pebble Transducers
abstract
Deterministic two-way transducers with pebbles (aka pebble transducers) capture the class of polyregular functions, which extend the string-to-string regular functions allowing polynomial growth instead of linear growth. One of the most fundamental operations on functions is composition, and (poly)regular functions can be realized as a composition of several simpler functions. In general, composition of deterministic two-way transducers incur a doubly exponential blow-up in the size of the inputs. A major improvement in this direction comes from the fundamental result of Dartois et al. [10] showing a polynomial construction for the composition of reversible two-way transducers. A precise complexity analysis for existing composition techniques of pebble transducers is missing. But they rely on the classic composition of two-way transducers and inherit the double exponential complexity. To overcome this problem, we introduce reversible pebble transducers. Our main results are efficient uniformization techniques for non-deterministic pebble transducers to reversible ones and efficient composition for reversible pebble transducers.
Luc Dartois, Paul Gastin, Loïc Germerie Guizouarn, S. Krishna 0004
CONCUR4
2025 Expressive Equivalence Between Decidable Freeze and Metric Timed Temporal Logics
abstract
We demonstrate a surprising and first-of-its-kind expressive equivalence between decidable metric and freeze logics over timed words in pointwise semantics. Our main result states that Metric Interval Temporal Logic with future, past and Pnueli modalities, MITPPL, and full unilateral timed propositional temporal logic with both future and past temporal modalities, UPTL, have identical expressiveness. One of the highlights of this paper, which allows for this equivalence, is to prove that UPTL formulas admit monadic decomposition. Our result also implies that several decidable logics for real-time specifications, such as one-variable UPTL, unilateral MITPPL, and Q2MLO, are all expressively equivalent, and the reductions between them are effective. Hence, our result unifies the fragmented expressiveness boundary of timed temporal logics. As corollaries, we resolve the open question of the decidability for full UPTL, and the variable or clock hierarchy problem for the future fragment of UPTL.
Hsi-Ming Ho, S. Krishna 0004, Khushraj Madnani, Rupak Majumdar, Paritosh K. Pandya
CONCUR2
2025 Efficient Linearizability Monitoring
abstract
This paper revisits the fundamental problem of monitoring the linearizability of concurrent stacks, queues, sets, and multisets. Given a history of a library implementing one of these abstract data types, the monitoring problem is to answer whether the given history is linearizable. For stacks, queues, and (multi)sets, we present monitoring algorithms with complexities 𝓞(𝑛 2 ), 𝓞(𝑛 𝑙𝑜𝑔 𝑛), and 𝓞(𝑛), respectively, where 𝑛 is the number of operations in the input history. For stacks and queues, our results hold under the standard assumption of data-independence, i.e., the behavior of the library is not sensitive to the actual values stored in the data structure. Past works to solve the same problems have cubic time complexity and (more seriously) have correctness issues: they either (i) lack correctness proofs or (ii) the suggested correctness proofs are erroneous (we present counter-examples), or (iii) have incorrect algorithms. Our improved complexity results rely on substantially different algorithms for which we provide detailed proofs of correctness. We have implemented our stack and queue algorithms in 𝐿𝑖𝑀𝑜 (Linearizability Monitor). We evaluate 𝐿𝑖𝑀𝑜 and compare it with the state-of-the-art tool 𝑉𝑖𝑜𝑙𝑖𝑛 – whose correctness proofs we have found errors in – which checks for linearizability violations. Our experimental evaluation confirms that 𝐿𝑖𝑀𝑜 outperforms 𝑉𝑖𝑜𝑙𝑖𝑛 regarding both efficiency and scalability.
Parosh Aziz Abdulla, Samuel Grahn, Bengt Jonsson 0001, S. Krishna 0004, Om Swostik Mishra
Proc. ACM Program. Lang.4
2024 Dynamic Partial Order Reduction for Transactional Programs on Serializable Platforms
Parosh Aziz Abdulla, Ashutosh Gupta 0001, S. Krishna 0004, Omkar Tuppe
ATVA3
2024 Reversible Transducers over Infinite Words
abstract
Deterministic two-way transducers capture the class of regular functions. The efficiency of composing two-way transducers has a direct implication in algorithmic problems related to reactive synthesis, where transformation specifications are converted into equivalent transducers. These specifications are presented in a modular way, and composing the resultant machines simulates the full specification. An important result by Dartois et al. shows that composition of two-way transducers enjoy a polynomial composition when the underlying transducer is reversible, that is, if they are both deterministic and co-deterministic. This is a major improvement over general deterministic two-way transducers, for which composition causes a doubly exponential blow-up in the size of the inputs in general. Moreover, they show that reversible two-way transducers have the same expressiveness as deterministic two-way transducers. However, the question of expressiveness of reversible transducers over infinite words is still open. In this article, we introduce the class of reversible two-way transducers over infinite words and show that they enjoy the same expressive power as deterministic two-way transducers over infinite words. This is done through a non-trivial, effective construction inducing a single exponential blow-up in the set of states. Further, we also prove that composing two reversible two-way transducers over infinite words incurs only a polynomial complexity, thereby providing foundations for efficient procedure for composition of transducers over infinite words.
Luc Dartois, Paul Gastin, Loïc Germerie Guizouarn, R. Govind 0001, S. Krishna 0004
CONCUR5
2024 An Efficient Quantifier Elimination Procedure for Presburger Arithmetic
Christoph Haase, S. Krishna 0004, Khushraj Madnani, Om Swostik Mishra, Georg Zetzsche
ICALP2
2024 Boundedness for Unions of Conjunctive Regular Path Queries over Simple Regular Expressions
abstract
The problem of whether a recursive query can be rewritten as query without recursion is a fundamental reasoning task, known as the boundedness problem. Here we study the boundedness problem for Unions of Conjunctive Regular Path Queries (UCRPQs), a navigational query language extensively used in ontology and graph database querying. The boundedness problem for UCRPQs is known to be decidable, ExpSpace-complete. Here we focus our analysis on UCRPQs using simple regular expressions, which are of high practical relevance and enjoy a lower reasoning complexity. We show that the complexity for the boundedness problem for this UCRPQs fragment is Pi-p-2-complete, and that an equivalent bounded query can be produced in polynomial time whenever possible. When the query turns out to be unbounded, we also study the task of finding an equivalent maximally bounded query, which we show to be feasible in Pi-p-2 . As a side result of independent interest stemming from our developments, we study a notion of succinct finite automata and prove that its membership problem is NP-complete.
Diego Figueira, S. Krishna 0004, Om Swostik Mishra, Anantha Padmanabha
KR2
2024 How Hard Is Weak-Memory Testing?
abstract
Weak-memory models are standard formal specifications of concurrency across hardware, programming languages, and distributed systems. A fundamental computational problem is consistency testing : is the observed execution of a concurrent program in alignment with the specification of the underlying system? The problem has been studied extensively across Sequential Consistency (SC) and weak memory, and proven to be N P -complete when some aspect of the input (e.g., number of threads/memory locations) is unbounded. This unboundedness has left a natural question open: are there efficient parameterized algorithms for testing? The main contribution of this paper is a deep hardness result for consistency testing under many popular weak-memory models: the problem remains N P -complete even in its bounded setting, where candidate executions contain a bounded number of threads, memory locations, and values. This hardness spreads across several Release-Acquire variants of C11, a popular variant of its Relaxed fragment, popular Causal Consistency models, and the POWER architecture. To our knowledge, this is the first result that fully exposes the hardness of weak-memory testing and proves that the problem admits no parameterization under standard input parameters. It also yields a computational separation of these models from SC, x86-TSO, PSO, and Relaxed, for which bounded consistency testing is either known (for SC), or shown here (for the rest), to be in polynomial time.
Soham Chakraborty 0001, S. Krishna 0004, Umang Mathur 0001, Andreas Pavlogiannis
Proc. ACM Program. Lang.2
2024 On-the-Fly Static Analysis via Dynamic Bidirected Dyck Reachability
abstract
Dyck reachability is a principled, graph-based formulation of a plethora of static analyses. Bidirected graphs are used for capturing dataflow through mutable heap data, and are usual formalisms of demand-driven points-to and alias analyses. The best (offline) algorithm runs in O ( m + n · α ( n ) ) time, where n is the number of nodes and m is the number of edges in the flow graph, which becomes O ( n 2 ) in the worst case. In the everyday practice of program analysis, the analyzed code is subject to continuous change, with source code being added and removed. On-the-fly static analysis under such continuous updates gives rise to dynamic Dyck reachability , where reachability queries run on a dynamically changing graph, following program updates. Naturally, executing the offline algorithm in this online setting is inadequate, as the time required to process a single update is prohibitively large. In this work we develop a novel dynamic algorithm for bidirected Dyck reachability that has O ( n · α ( n ) ) worst-case performance per update, thus beating the O ( n 2 ) bound, and is also optimal in certain settings. We also implement our algorithm and evaluate its performance on on-the-fly data-dependence and alias analyses, and compare it with two best known alternatives, namely (i) the optimal offline algorithm, and (ii) a fully dynamic Datalog solver. Our experiments show that our dynamic algorithm is consistently, and by far, the top performing algorithm, exhibiting speedups in the order of 1000X. The running time of each update is almost always unnoticeable to the human eye, making it ideal for the on-the-fly analysis setting.
S. Krishna 0004, Aniket Lal, Andreas Pavlogiannis, Omkar Tuppe
Proc. ACM Program. Lang.1
2023 Correct-by-Construction Reinforcement Learning of Cardiac Pacemakers from Duration Calculus Requirements
abstract
As the complexity of pacemaker devices continues to grow, the importance of capturing its functional correctness requirement formally cannot be overestimated. The pacemaker system specification document by \emph{Boston Scientific} provides a widely accepted set of specifications for pacemakers. As these specifications are written in a natural language, they are not amenable for automated verification, synthesis, or reinforcement learning of pacemaker systems. This paper presents a formalization of these requirements for a dual-chamber pacemaker in \emph{duration calculus} (DC), a highly expressive real-time specification language. The proposed formalization allows us to automatically translate pacemaker requirements into executable specifications as stopwatch automata, which can be used to enable simulation, monitoring, validation, verification and automatic synthesis of pacemaker systems. The cyclic nature of the pacemaker-heart closed-loop system results in DC requirements that compile to a decidable subclass of stopwatch automata. We present shield reinforcement learning (shield RL), a shield synthesis based reinforcement learning algorithm, by automatically constructing safety envelopes from DC specifications.
Kalyani Dole, Ashutosh Gupta 0001, John Komp, S. Krishna 0004, Ashutosh Trivedi 0001
AAAI4
2023 Overcoming Memory Weakness with Unified Fairness - Systematic Verification of Liveness in Weak Memory Models
abstract
Abstract We consider the verification of liveness properties for concurrent programs running on weak memory models. To that end, we identify notions of fairness that preclude demonic non-determinism, are motivated by practical observations, and are amenable to algorithmic techniques. We provide both logical and stochastic definitions of our fairness notions, and prove that they are equivalent in the context of liveness verification. In particular, we show that our fairness allows us to reduce the liveness problem (repeated control state reachability) to the problem of simple control state reachability. We show that this is a general phenomenon by developing a uniform framework which serves as the formal foundation of our fairness definition, and can be instantiated to a wide landscape of memory models. These models include SC, TSO, PSO, (Strong/Weak) Release-Acquire, Strong Coherence, FIFO-consistency, and RMO.
Parosh Aziz Abdulla, Mohamed Faouzi Atig, Adwait Godbole, S. Krishna 0004, Mihir Vahanwala
CAV (1)4
2023 Satisfiability Checking of Multi-Variable TPTL with Unilateral Intervals Is PSPACE-Complete
abstract
We investigate the decidability of the ${0,\infty}$ fragment of Timed Propositional Temporal Logic (TPTL). We show that the satisfiability checking of TPTL$^{0,\infty}$ is PSPACE-complete. Moreover, even its 1-variable fragment (1-TPTL$^{0,\infty}$) is strictly more expressive than Metric Interval Temporal Logic (MITL) for which satisfiability checking is EXPSPACE complete. Hence, we have a strictly more expressive logic with computationally easier satisfiability checking. To the best of our knowledge, TPTL$^{0,\infty}$ is the first multi-variable fragment of TPTL for which satisfiability checking is decidable without imposing any bounds/restrictions on the timed words (e.g. bounded variability, bounded time, etc.). The membership in PSPACE is obtained by a reduction to the emptiness checking problem for a new "non-punctual" subclass of Alternating Timed Automata with multiple clocks called Unilateral Very Weak Alternating Timed Automata (VWATA$^{0,\infty}$) which we prove to be in PSPACE. We show this by constructing a simulation equivalent non-deterministic timed automata whose number of clocks is polynomial in the size of the given VWATA$^{0,\infty}$.
S. Krishna 0004, Khushraj Madnani, Rupak Majumdar, Paritosh K. Pandya
CONCUR1
2023 Counter Machines with Infrequent Reversals
abstract
Bounding the number of reversals in a counter machine is one of the most prominent restrictions to achieve decidability of the reachability problem. Given this success, we explore whether this notion can be relaxed while retaining decidability. To this end, we introduce the notion of an f-reversal-bounded counter machine for a monotone function f: ℕ → ℕ. In such a machine, every run of length n makes at most f(n) reversals. Our first main result is a dichotomy theorem: We show that for every monotone function f, one of the following holds: Either (i) f grows so slowly that every f-reversal bounded counter machine is already k-reversal bounded for some constant k or (ii) f belongs to Ω(log(n)) and reachability in f-reversal bounded counter machines is undecidable. This shows that classical reversal bounding already captures the decidable cases of f-reversal bounding for any monotone function f. The key technical ingredient is an analysis of the growth of small solutions of iterated compositions of Presburger-definable constraints. In our second contribution, we investigate whether imposing f-reversal boundedness improves the complexity of the reachability problem in vector addition systems with states (VASS). Here, we obtain an analogous dichotomy: We show that either (i) f grows so slowly that every f-reversal-bounded VASS is already k-reversal-bounded for some constant k or (ii) f belongs to Ω(n) and the reachability problem for f-reversal-bounded VASS remains Ackermann-complete. This result is proven using run amalgamation in VASS. Overall, our results imply that classical restriction of reversal boundedness is a robust one.
Alain Finkel, S. Krishna 0004, Khushraj Madnani, Rupak Majumdar, Georg Zetzsche
FSTTCS2
2023 Parameterized Verification under TSO with Data Types
abstract
Abstract We consider parameterized verification of systems executing according to the total store ordering (TSO) semantics. The processes manipulate abstract data types over potentially infinite domains. We present a framework that translates the reachability problem for such systems to the reachability problem for register machines enriched with the given abstract data type.
Parosh Aziz Abdulla, Mohamed Faouzi Atig, Florian Furbach, Adwait Godbole, Yacoub G. Hendi, S. Krishna 0004, Stephan Spengler
TACAS (1)6
2023 Optimal Stateless Model Checking for Causal Consistency
abstract
Abstract We present a framework for efficient stateless model checking (SMC) of concurrent programs under three prominent models of causal consistency, $${\texttt {CCv}}, {\texttt {CM}}, \texttt{CC}$$ CCv , CM , CC . Our approach is based on exploring traces under the program order "Image missing" and the reads from "Image missing" relations. Our SMC algorithm is provably optimal in the sense that it explores each "Image missing" and "Image missing" relation exactly once. We have implemented our framework in a tool called Conschecker . Experiments show that Conschecker performs well in detecting anomalies in classical distributed databases benchmarks.
Parosh Aziz Abdulla, Mohamed Faouzi Atig, S. Krishna 0004, Ashutosh Gupta 0001, Omkar Tuppe
TACAS (1)3
2023 From Non-punctuality to Non-adjacency: A Quest for Decidability of Timed Temporal Logics with Quantifiers
abstract
Metric Temporal Logic (MTL) and Timed Propositional Temporal Logic (TPTL) are prominent real-time extensions of Linear Temporal Logic (LTL). In general, the satisfiability checking problem for these extensions is undecidable when both the future (Until, U) and the past (Since, S) modalities are used (denoted by MTL[U,S] and TPTL[U,S]). In a classical result, the satisfiability checking for Metric Interval Temporal Logic (MITL[U,S]), a non-punctual fragment of MTL[U,S], is shown to be decidable with EXPSPACE complete complexity. A straightforward adoption of non-punctuality does not recover decidability in the case of TPTL[U,S]. Hence, we propose a more refined notion called non-adjacency for TPTL[U,S] and focus on its 1-variable fragment, 1-TPTL[U,S]. We show that non-adjacent 1-TPTL[U,S] is strictly more expressive than MITL. As one of our main results, we show that the satisfiability checking problem for non-adjacent 1-TPTL[U,S] is decidable with EXPSPACE complete complexity. Our decidability proof relies on a novel technique of anchored interval word abstraction and its reduction to a non-adjacent version of the newly proposed logic called PnEMTL. We further propose an extension of MSO [<] (Monadic Second Order Logic of Orders) with Guarded Metric Quantifiers (GQMSO) and show that it characterizes the expressiveness of PnEMTL. That apart, we introduce the notion of non-adjacency in the context of GQMSO (NA-GQMSO), which is a syntactic generalization of logic Q2MLO due to Hirshfeld and Rabinovich and show the decidability of satisfiability checking for NA-GQMSO.
S. Krishna 0004, Khushraj Madnani, Manuel Mazo 0002, Paritosh K. Pandya
Formal Aspects Comput.1
2023 Optimal Reads-From Consistency Checking for C11-Style Memory Models
abstract
Over the years, several memory models have been proposed to capture the subtle concurrency semantics of C/C++. One of the most fundamental problems associated with a memory model M is consistency checking: given an execution X , is X consistent with M ? This problem lies at the heart of numerous applications, including specification testing and litmus tests, stateless model checking, and dynamic analyses. As such, it has been explored extensively and its complexity is well-understood for traditional models like SC and TSO. However, less is known for the numerous model variants of C/C++, for which the problem becomes challenging due to the intricacies of their concurrency primitives. In this work we study the problem of consistency checking for popular variants of the C11 memory model, in particular, the RC 20 model, its release-acquire ( RA ) fragment, the strong and weak variants of RA ( SRA and WRA ), as well as the Relaxed fragment of RC 20. Motivated by applications in testing and model checking, we focus on reads-from consistency checking. The input is an execution X specifying a set of events, their program order and their reads-from relation, and the task is to decide the existence of a modification order on the writes of X that makes X consistent in a memory model. We draw a rich complexity landscape for this problem; our results include (i) nearly-linear-time algorithms for certain variants, which improve over prior results, (ii) fine-grained optimality results, as well as (iii) matching upper and lower bounds (NP-hardness) for other variants. To our knowledge, this is the first work to characterize the complexity of consistency checking for C11 memory models. We have implemented our algorithms inside the TruSt model checker and the C11Tester testing tool. Experiments on standard benchmarks show that our new algorithms improve consistency checking, often by a significant margin.
Hünkar Can Tunç, Parosh Aziz Abdulla, Soham Chakraborty 0001, S. Krishna 0004, Umang Mathur 0001, Andreas Pavlogiannis
Proc. ACM Program. Lang.4
2022 Optimal Repair for Omega-Regular Properties
Vrunda Dave, S. Krishna 0004, Vishnu Murali, Ashutosh Trivedi 0001
ATVA2
2022 Probabilistic Total Store Ordering
abstract
Abstract We present Probabilistic Total Store Ordering (PTSO) – a probabilistic extension of the classical TSO semantics. For a given (finite-state) program, the operational semantics of PTSO induces an infinite-state Markov chain. We resolve the inherent non-determinism due to process schedulings and memory updates according to given probability distributions. We provide a comprehensive set of results showing the decidability of several properties for PTSO, namely (i) Almost-Sure (Repeated) Reachability: whether a run, starting from a given initial configuration, almost surely visits (resp. almost surely repeatedly visits) a given set of target configurations. (ii) Almost-Never (Repeated) Reachability: whether a run from the initial configuration, almost never visits (resp. almost never repeatedly visits) the target. (iii) Approximate Quantitative (Repeated) Reachability: to approximate, up to an arbitrary degree of precision, the measure of runs that start from the initial configuration and (repeatedly) visit the target. (iv) Expected Average Cost: to approximate, up to an arbitrary degree of precision, the expected average cost of a run from the initial configuration to the target. We derive our results through a nontrivial combination of results from the classical theory of (infinite-state) Markov chains, the theories of decisive and eager Markov chains, specific techniques from combinatorics, as well as, decidability and complexity results for the classical (non-probabilistic) TSO semantics. As far as we know, this is the first work that considers probabilistic verification of programs running on weak memory models.
Parosh Aziz Abdulla, Mohamed Faouzi Atig, Raj Aryan Agarwal, Adwait Godbole, S. Krishna 0004
ESOP5
2022 Efficient Construction of Reversible Transducers from Regular Transducer Expressions
abstract
The class of regular transformations has several equivalent characterizations such as functional MSO transductions, deterministic two-way transducers, streaming string transducers, as well as regular transducer expressions (RTE).
Luc Dartois, Paul Gastin, R. Govind 0001, S. Krishna 0004
LICS4
2022 Parameterized Verification under Release Acquire is PSPACE-complete
abstract
We study the safety verification problem for parameterized systems under the release-acquire (RA) semantics. In the non-parameterized setting, access to atomic compare-and-swap (CAS) instructions renders the safety verification problem undecidable. In the light of this result, we consider parameterized systems consisting of an unbounded number of environment threads executing identical but CAS-free programs combined with a fixed number of distinguished threads that are unrestricted. Our first contribution is an effective and simplified RA semantics for such systems. We leverage the simplified semantics to show that safety verification becomes PSPACE in the parameterized case, an optimistic result for algorithmic verification. Our proof uses an encoding to Datalog which, in addition to the complexity upper bound, suggests a verification algorithm based on Horn clause solvers. We also provide a matching lower bound showing that safety verification is PSPACE-hard.
S. Krishna 0004, Adwait Godbole, Roland Meyer 0001, Soham Chakraborty 0001
PODC1
2022 Regular transducer expressions for regular transformations
abstract
Functional MSO transductions, deterministic two-way transducers, as well as streaming string transducers are all equivalent models for regular functions. In this paper, we show that every regular function, either on finite words or on infinite words, captured by a deterministic two-way transducer, can be described with a regular transducer expression (RTE). For infinite words, the transducer uses Muller acceptance and ω-regular look-ahead. RTEs are constructed from constant functions using the combinators if-then-else (deterministic choice), Hadamard product, and unambiguous versions of the Cauchy product, the 2-chained Kleene-iteration and the 2-chained omega-iteration. Our proof works for transformations of both finite and infinite words, extending the result on finite words of Alur et al. in LICS'14. In order to construct an RTE associated with a deterministic two-way Muller transducer with look-ahead, we introduce the notion of transition monoid for such two-way transducers where the look-ahead is captured by some backward deterministic Büchi automaton. Then, we use an unambiguous version of Imre Simon's famous forest factorization theorem in order to derive a "good" (ω-)regular expression for the domain of the two-way transducer. "Good" expressions are unambiguous and Kleene-plus as well as ω-iterations are only used on subexpressions corresponding to idempotent elements of the transition monoid. The combinator expressions are finally constructed by structural induction on the "good" (ω-)regular expression describing the domain of the transducer.
Vrunda Dave, Paul Gastin, S. Krishna 0004
Inf. Comput.3
2022 Synthesis of Computable Regular Functions of Infinite Words
abstract
Regular functions from infinite words to infinite words can be equivalently specified by MSO-transducers, streaming $\omega$-string transducers as well as deterministic two-way transducers with look-ahead. In their one-way restriction, the latter transducers define the class of rational functions. Even though regular functions are robustly characterised by several finite-state devices, even the subclass of rational functions may contain functions which are not computable (by a Turing machine with infinite input). This paper proposes a decision procedure for the following synthesis problem: given a regular function $f$ (equivalently specified by one of the aforementioned transducer model), is $f$ computable and if it is, synthesize a Turing machine computing it. For regular functions, we show that computability is equivalent to continuity, and therefore the problem boils down to deciding continuity. We establish a generic characterisation of continuity for functions preserving regular languages under inverse image (such as regular functions). We exploit this characterisation to show the decidability of continuity (and hence computability) of rational and regular functions. For rational functions, we show that this can be done in $\mathsf{NLogSpace}$ (it was already known to be in $\mathsf{PTime}$ by Prieur). In a similar fashion, we also effectively characterise uniform continuity of regular functions, and relate it to the notion of uniform computability, which offers stronger efficiency guarantees.
Vrunda Dave, Emmanuel Filiot, S. Krishna 0004, Nathan Lhote
Log. Methods Comput. Sci.3
2021 Scope-Bounded Reachability in Valence Systems
abstract
Multi-pushdown systems are a standard model for concurrent recursive programs, but they have an undecidable reachability problem. Therefore, there have been several proposals to underapproximate their sets of runs so that reachability in this underapproximation becomes decidable. One such underapproximation that covers a relatively high portion of runs is scope boundedness. In such a run, after each push to stack i, the corresponding pop operation must come within a bounded number of visits to stack i. In this work, we generalize this approach to a large class of infinite-state systems. For this, we consider the model of valence systems, which consist of a finite-state control and an infinite-state storage mechanism that is specified by a finite undirected graph. This framework captures pushdowns, vector addition systems, integer vector addition systems, and combinations thereof. For this framework, we propose a notion of scope boundedness that coincides with the classical notion when the storage mechanism happens to be a multi-pushdown. We show that with this notion, reachability can be decided in PSPACE for every storage mechanism in the framework. Moreover, we describe the full complexity landscape of this problem across all storage mechanisms, both in the case of (i) the scope bound being given as input and (ii) for fixed scope bounds. Finally, we provide an almost complete description of the complexity landscape if even a description of the storage mechanism is part of the input.
Aneesh K. Shetty, S. Krishna 0004, Georg Zetzsche
CONCUR2
2021 The Decidability of Verification under PS 2.0
abstract
Abstract We consider the reachability problem for finite-state multi-threaded programs under the promising semantics () of Lee et al., which captures most common program transformations. Since reachability is already known to be undecidable in the fragment of with only release-acquire accesses (-), we consider the fragment with only relaxed accesses and promises (). We show that reachability under is undecidable in general and that it becomes decidable, albeit non-primitive recursive, if we bound the number of promises. Given these results, we consider a bounded version of the reachability problem. To this end, we bound both the number of promises and of “view-switches”, i.e., the number of times the processes may switch their local views of the global memory. We provide a code-to-code translation from an input program under (with relaxed and release-acquire memory accesses along with promises) to a program under SC, thereby reducing the bounded reachability problem under to the bounded context-switching problem under SC. We have implemented a tool and tested it on a set of benchmarks, demonstrating that typical bugs in programs can be found with a small bound.
Parosh Aziz Abdulla, Mohamed Faouzi Atig, Adwait Godbole, S. Krishna 0004, Viktor Vafeiadis
ESOP4
2021 Regular Model Checking with Regular Relations
Vrunda Dave, Taylor Dohmen, S. Krishna 0004, Ashutosh Trivedi 0001
FCT3
2021 Generalizing Non-punctuality for Timed Temporal Logic with Freeze Quantifiers
S. Krishna 0004, Khushraj Madnani, Manuel Mazo 0002, Paritosh K. Pandya
FM1
2021 One-way Resynchronizability of Word Transducers
abstract
Abstract The origin semantics for transducers was proposed in 2014, and it led to various characterizations and decidability results that are in contrast with the classical semantics. In this paper we add a further decidability result for characterizing transducers that are close to one-way transducers in the origin semantics. We show that it is decidable whether a non-deterministic two-way word transducer can be resynchronized by a bounded, regular resynchronizer into an origin-equivalent one-way transducer. The result is in contrast with the usual semantics, where it is undecidable to know if a non-deterministic two-way transducer is equivalent to some one-way transducer.
Sougata Bose, S. Krishna 0004, Anca Muscholl, Gabriele Puppis
FoSSaCS2
2021 Resilience of Timed Systems
abstract
Erroneous behaviour in safety critical real-time systems may inflict serious consequences. In this paper, we show how to synthesize timed shields from timed safety properties given as timed automata. A timed shield enforces the safety of a running system while interfering with the system as little as possible. We present timed post-shields and timed pre-shields. A timed pre-shield is placed before the system and provides a set of safe outputs. This set restricts the choices of the system. A timed post-shield is implemented after the system. It monitors the system and corrects the system's output only if necessary. We further extend the timed post-shield construction to provide a guarantee on the recovery phase, i.e., the time between a specification violation and the point at which full control can be handed back to the system. In our experimental results, we use timed post-shields to ensure the safety in a reinforcement learning setting for controlling a platoon of cars, during the learning and execution phase, and study the effect.
S. Akshay 0001, Blaise Genest, Loïc Hélouët, S. Krishna 0004, Sparsa Roychowdhury
FSTTCS4
2021 SD-Regular Transducer Expressions for Aperiodic Transformations
abstract
FO transductions, aperiodic deterministic two-way transducers, as well as aperiodic streaming string transducers are all equivalent models for first order definable functions. In this paper, we solve the problem of expressions capturing first order definable functions, thereby generalizing the seminal SF=AP (star-free expressions = aperiodic languages) result of Schützenberger. Our result also generalizes a lesser known characterization by Schutzenberger of aperiodic languages by SD-regular expressions (SD=AP). We show that every first order definable function over finite words captured by an aperiodic deterministic two-way transducer can be described with an SD-regular transducer expression (SDRTE). An SDRTE is a regular expression where Kleene stars are used in a restricted way: they can appear only on aperiodic languages which are prefix codes of bounded synchronization delay. SDRTEs are constructed from simple functions using the combinators unambiguous sum (deterministic choice), Hadamard product, and unambiguous versions of the Cauchy product and the fc-chained Kleene-star, where the star is restricted as mentioned. In order to construct an SDRTE associated with an aperiodic deterministic two-way transducer, (i) we concretize Schutzenberger's SD=AP result, by proving that aperiodic languages are captured by SD-regular expressions which are unambiguous and stabilising; (ii) by structural induction on the unambiguous, stabilising SD-regular expressions describing the domain of the transducer, we construct SDRTEs. Finally, we also look at various formalisms equivalent to SDRTEs which use the function composition, allowing to trade the fc-chained star for a 1-star.
Luc Dartois, Paul Gastin, S. Krishna 0004
LICS3
2021 Event-Triggered and Time-Triggered Duration Calculus for Model-Free Reinforcement Learning
abstract
Reinforcement Learning (RL) is a sampling based approach to optimization, where learning agents rely on scalar reward signals to discover optimal solutions. The specification of learning objectives as scalar rewards is tedious and error prone, and more so for real-time systems with complex time-critical requirements. This paper advocates the use of Duration Calculus (DC)—a highly expressive real-time logic with duration and length modalities—in expressing the learning objectives in model-free RL for stochastic real-time systems. On the other hand, to model stochastic real-time environments, we consider probabilistic timed automata (PTA)—Markov decision processes extended with clock variables—that provide an expressive yet computationally decidable formalism to capture real-time constraints over nondeterministic and probabilistic behaviors.The key hurdle in developing a convergent RL algorithm for DC specifications is the undecidability of the synthesis problem for PTA against general DC specifications. Inspired by the dichotomy between event-triggered and time-triggered approaches to the design of real-time systems, we present two variants of DC logic—that we dub event-triggered duration calculus (EDC) and time-triggered duration calculus (TDC)—and identify their subclasses with appealing theoretical properties. We study the decidability (and exact complexity) of the satisfiability of these calculi as well as the controller synthesis against PTA models. Based on these results, we propose a reward scheme for RL agents in such a way that guarantees that any RL algorithm maximizing rewards is guaranteed to maximize the probability of satisfaction for the given DC specification. The effectiveness of the proposed approach is demonstrated via grid-world benchmarks and a proof-of-concept case study for synthesizing control for simple cardiac pacemaker directly from a set of DC specifications.
Kalyani Dole, Ashutosh Gupta 0001, John Komp, S. Krishna 0004, Ashutosh Trivedi 0001
RTSS4
2020 Robust Controller Synthesis for Duration Calculus
Kalyani Dole, Ashutosh Gupta 0001, S. Krishna 0004
ATVA3
2020 On the Separability Problem of String Constraints
abstract
We address the separability problem for straight-line string constraints. The separability problem for languages of a class C by a class S asks: given two languages A and B in C, does there exist a language I in S separating A and B (i.e., I is a superset of A and disjoint from B)? The separability of string constraints is the same as the fundamental problem of interpolation for string constraints. We first show that regular separability of straight line string constraints is undecidable. Our second result is the decidability of the separability problem for straight-line string constraints by piece-wise testable languages, though the precise complexity is open. In our third result, we consider the positive fragment of piece-wise testable languages as a separator, and obtain an EXPSPACE algorithm for the separability of a useful class of straight-line string constraints, and a PSPACE-hardness result.
Parosh Aziz Abdulla, Mohamed Faouzi Atig, Vrunda Dave, S. Krishna 0004
CONCUR4
2020 Synthesis of Computable Regular Functions of Infinite Words
Vrunda Dave, Emmanuel Filiot, S. Krishna 0004, Nathan Lhote
CONCUR3
2020 Containment of Simple Conjunctive Regular Path Queries
abstract
Testing containment of queries is a fundamental reasoning task in knowledge representation. We study here the containment problem for Conjunctive Regular Path Queries (CRPQs), a navigational query language extensively used in ontology and graph database querying. While it is known that containment of CRPQs is EXPSPACE-complete in general, we focus here on severely restricted fragments, which are known to be highly relevant in practice according to several recent studies. We obtain a detailed overview of the complexity of the containment problem, depending on the features used in the regular expressions of the queries, with completeness results for NP, Pi2p, PSPACE or EXPSPACE.
Diego Figueira, Adwait Godbole, S. Krishna 0004, Wim Martens, Matthias Niewerth, Tina Popp
KR3
2020 Revisiting Underapproximate Reachability for Multipushdown Systems
abstract
Boolean programs with multiple recursive threads can be captured as pushdown automata with multiple stacks. This model is Turing complete, and hence, one is often interested in analyzing a restricted class which still captures useful behaviors. In this paper, we propose a new class of bounded underapproximations for multi-pushdown systems, which subsumes most existing classes. We develop an efficient algorithm for solving the under-approximate reachability problem, which is based on efficient fix-point computations. We implement it in our tool BHIM and illustrate its applicability by generating a set of relevant benchmarks and examining its performance. As an additional takeaway BHIM solves the binary reachability problem in pushdown automata. To show the versatility of our approach, we then extend our algorithm to the timed setting and provide the first implementation that can handle timed multi-pushdown automata with closed guards.
S. Akshay 0001, Paul Gastin, S. Krishna 0004, Sparsa Roychowdhury
TACAS (1)3
2019 On Timed Scope-Bounded Context-Sensitive Languages
Devendra Bhave, S. Krishna 0004, Ramchandra Phawade, Ashutosh Trivedi 0001
DLT2
2019 Knowledge Compilation for Boolean Functional Synthesis
abstract
Given a Boolean formula F(X, Y), where X is a vector of outputs and Y is a vector of inputs, the Boolean functional synthesis problem requires us to compute a Skolem function vector Ψ(Y) such that F(Ψ(Y), Y) holds whenever ∃X F(X, Y) holds. In this paper, we investigate the relation between the representation of the specification F(X, Y) and the complexity of synthesis. We introduce a new normal form for Boolean formulas, called SynNNF, that guarantees polynomial-time synthesis and also polynomial-time existential quantification for some order of quantification of variables. We show that several normal forms studied in the knowledge compilation literature are subsumed by SynNNF, although SynNNF can be super-polynomially more succinct than them. Motivated by these results, we propose an algorithm to convert a specification in CNF to SynNNF, with the intent of solving the Boolean functional synthesis problem. Experiments with a prototype implementation show that this approach solves several benchmarks beyond the reach of state-of-the-art tools.
S. Akshay 0001, Jatin Arora 0002, Supratik Chakraborty, S. Krishna 0004, Divya Raghunathan, Shetal Shah
FMCAD4
2019 Timed Systems through the Lens of Logic
abstract
In this paper, we analyze timed systems with data structures. We start by describing behaviors of timed systems using graphs with timing constraints. Such a graph is called realizable if we can assign time-stamps to nodes or events so that they are consistent with the timing constraints. The logical definability of several graph properties [20], [10] has been a challenging problem, and we show, using a highly nontrivial argument, that the realizability property for collections of graphs with strict timing constraints is logically definable in a class of propositional dynamic logic (EQ-ICPDL), which is strictly contained in MSO. Using this result, we propose a novel, algorithmically efficient and uniform proof technique for the analysis of timed systems enriched with auxiliary data structures, like stacks and queues. Our technique unravels new results (for emptiness checking as well as model checking) for timed systems with richer features than considered so far, while also recovering existing results.
S. Akshay 0001, Paul Gastin, Vincent Jugé, S. Krishna 0004
LICS4
2019 On Synthesis of Resynchronizers for Transducers
abstract
We study two formalisms that allow to compare transducers over words under origin semantics: rational and regular resynchronizers, and show that the former are captured by the latter. We then consider some instances of the following synthesis problem: given transducers T_1,T_2, construct a rational (resp. regular) resynchronizer R, if it exists, such that T_1 is contained in R(T_2) under the origin semantics. We show that synthesis of rational resynchronizers is decidable for functional, and even finite-valued, one-way transducers, and undecidable for relational one-way transducers. In the two-way setting, synthesis of regular resynchronizers is shown to be decidable for unambiguous two-way transducers. For larger classes of two-way transducers, the decidability status is open.
Sougata Bose, S. Krishna 0004, Anca Muscholl, Vincent Penelle, Gabriele Puppis
MFCS2
2019 Verification of programs under the release-acquire semantics
abstract
We address the verification of concurrent programs running under the release-acquire (RA) semantics. We show that the reachability problem is undecidable even in the case where the input program is finite-state. Given this undecidability, we follow the spirit of the work on context-bounded analysis for detecting bugs in programs under the classical SC model, and propose an under-approximate reachability analysis for the case of RA. To this end, we propose a novel notion, called view-switching, and provide a code-to-code translation from an input program under RA to a program under SC. This leads to a reduction, in polynomial time, of the bounded view-switching reachability problem under RA to the bounded context-switching problem under SC. We have implemented a prototype tool VBMC and tested it on a set of benchmarks, demonstrating that many bugs in programs can be found using a small number of view switches.
Parosh Aziz Abdulla, Jatin Arora 0002, Mohamed Faouzi Atig, S. Krishna 0004
PLDI4
2018 Logics Meet 1-Clock Alternating Timed Automata
abstract
This paper investigates Kamp-like and Büchi-like theorems for 1-clock Alternating Timed Automata (1-ATA) and its natural subclasses. A notion of 1-ATA with loop-free-resets is defined. This automaton class is shown to be expressively equivalent to the temporal logic $\regmtl$ which is $\mathsf{MTL[F_I]}$ extended with a regular expression guarded modality. Moreover, a subclass of future timed MSO with k-variable-connectivity property is introduced as logic $\qkmso$. In a Kamp-like result, it is shown that $\regmtl$ is expressively equivalent to $\qkmso$. As our second result, we define a notion of conjunctive-disjunctive 1-clock ATA ($\wf$ 1-ATA). We show that $\wf$ 1-ATA with loop-free-resets are expressively equivalent to the sublogic $\F\regmtl$ of $\regmtl$. Moreover $\F\regmtl$ is expressively equivalent to $\qtwomso$, the two-variable connected fragment of $\qkmso$. The full class of 1-ATA is shown to be expressively equivalent to $\regmtl$ extended with fixed point operators.
S. Krishna 0004, Khushraj Madnani, Paritosh K. Pandya
CONCUR1
2018 Verification of Timed Asynchronous Programs
abstract
In this paper, we address the verification problem for timed asynchronous programs. We associate to each task, a deadline for its execution. We first show that the control state reachability problem for such class of systems is decidable while the configuration reachability problem is undecidable. Then, we consider the subclass of timed asynchronous programs where tasks are always being executed from the same state. For this subclass, we show that the control state reachability problem is PSPACE-complete. Furthermore, we show the decidability for the configuration reachability problem for the subclass.
Parosh Aziz Abdulla, Mohamed Faouzi Atig, S. Krishna 0004, Shaan Vaidya
FSTTCS3
2018 Regular and First-Order List Functions
abstract
We define two classes of functions, called regular (respectively, first-order) list functions, which manipulate objects such as lists, lists of lists, pairs of lists, lists of pairs of lists, etc. The definition is in the style of regular expressions: the functions are constructed by starting with some basic functions (e.g. projections from pairs, or head and tail operations on lists) and putting them together using four combinators (most importantly, composition of functions). Our main results are that first-order list functions are exactly the same as first-order transductions, under a suitable encoding of the inputs; and the regular list functions are exactly the same as MSO-transductions.
Mikolaj Bojanczyk, Laure Daviaud, S. Krishna 0004
LICS3
2018 Regular Transducer Expressions for Regular Transformations
Vrunda Dave, Paul Gastin, S. Krishna 0004
LICS3
2018 Analyzing Timed Systems Using Tree Automata
abstract
Timed systems, such as timed automata, are usually analyzed using their operational semantics on timed words. The classical region abstraction for timed automata reduces them to (untimed) finite state automata with the same time-abstract properties, such as state reachability. We propose a new technique to analyze such timed systems using finite tree automata instead of finite word automata. The main idea is to consider timed behaviors as graphs with matching edges capturing timing constraints. When a family of graphs has bounded tree-width, they can be interpreted in trees and MSO-definable properties of such graphs can be checked using tree automata. The technique is quite general and applies to many timed systems. In this paper, as an example, we develop the technique on timed pushdown systems, which have recently received considerable attention. Further, we also demonstrate how we can use it on timed automata and timed multi-stack pushdown systems (with boundedness restrictions).
S. Akshay 0001, Paul Gastin, S. Krishna 0004
Log. Methods Comput. Sci.3
2017 The Reach-Avoid Problem for Constant-Rate Multi-mode Systems
S. Krishna 0004, Aviral Kumar, Fabio Somenzi, Behrouz Touri, Ashutosh Trivedi 0001
ATVA1
2017 Towards an Efficient Tree Automata Based Technique for Timed Systems
abstract
The focus of this paper is the analysis of real-time systems with recursion, through the development of good theoretical techniques which are implementable. Time is modeled using clock variables, and recursion using stacks. Our technique consists of modeling the behaviours of the timed system as graphs, and interpreting these graphs on tree terms by showing a bound on their tree-width. We then build a tree automaton that accepts exactly those tree terms that describe realizable runs of the timed system. The emptiness of the timed system thus boils down to emptiness of a finite tree automaton that accepts these tree terms. This approach helps us in obtaining an optimal complexity, not just in theory (as done in earlier work), but also in going towards an efficient implementation of our technique. To do this, we make several improvements in the theory and exploit these to build a first prototype tool that can analyze timed systems with recursion.
S. Akshay 0001, Paul Gastin, S. Krishna 0004, Ilias Sarkar
CONCUR3
2017 Making Metric Temporal Logic Rational
abstract
We study an extension of MTL in pointwise time with regular expression guarded modality Reg_I(re) where re is a rational expression over subformulae. We study the decidability and expressiveness of this extension (MTL+Ureg+Reg), called RegMTL, as well as its fragment SfrMTL where only star-free rational expressions are allowed. Using the technique of temporal projections, we show that RegMTL has decidable satisfiability by giving an equisatisfiable reduction to MTL. We also identify a subclass MITL+UReg of RegMTL for which our equisatisfiable reduction gives rise to formulae of MITL, yielding elementary decidability. As our second main result, we show a tight automaton-logic connection between SfrMTL and partially ordered (or very weak) 1-clock alternating timed automata.
S. Krishna 0004, Khushraj Madnani, Paritosh K. Pandya
MFCS1
2017 Further results on generalised communicating P systems
S. Krishna 0004, Marian Gheorghe 0001, Florentin Ipate, Erzsébet Csuhaj-Varjú, Rodica Ceterchi
Theor. Comput. Sci.1
2016 Analyzing Timed Systems Using Tree Automata
abstract
International audience
S. Akshay 0001, Paul Gastin, S. Krishna 0004
CONCUR3
2016 A Perfect Class of Context-Sensitive Timed Languages
Devendra Bhave, Vrunda Dave, S. Krishna 0004, Ramchandra Phawade, Ashutosh Trivedi 0001
DLT3
2016 Metric Temporal Logic with Counting
S. Krishna 0004, Khushraj Madnani, Paritosh K. Pandya
FoSSaCS1
2016 FO-Definable Transformations of Infinite Strings
abstract
The theory of regular and aperiodic transformations of finite strings has recently received a lot of interest. These classes can be equivalently defined using logic (Monadic second-order logic and first-order logic), two-way machines (regular two-way and aperiodic two-way transducers), and one-way register machines (regular streaming string and aperiodic streaming string transducers). These classes are known to be closed under operations such as sequential composition and regular (star-free) choice; and problems such as functional equivalence and type checking, are decidable for these classes. On the other hand, for infinite strings these results are only known for regular transformations: Alur, Filiot, and Trivedi studied transformations of infinite strings and introduced an extension of streaming string transducers over infinte strings and showed that they capture monadic second-order definable transformations for infinite strings. In this paper we extend their work to recover connection for infinite strings among first-order logic definable transformations, aperiodic two-way transducers, and aperiodic streaming string transducers.
Vrunda Dave, S. Krishna 0004, Ashutosh Trivedi 0001
FSTTCS2
2016 Mean-Payoff Games on Timed Automata
abstract
Mean-payoff games on timed automata are played on the infinite weighted graph of configurations of priced timed automata between two players, Player Min and Player Max, by moving a token along the states of the graph to form an infinite run. The goal of Player Min is to minimize the limit average weight of the run, while the goal of the Player Max is the opposite. Brenguier, Cassez, and Raskin recently studied a variation of these games and showed that mean-payoff games are undecidable for timed automata with five or more clocks. We refine this result by proving the undecidability of mean-payoff games with three clocks. On a positive side, we show the decidability of mean-payoff games on one-clock timed automata with binary price-rates. A key contribution of this paper is the application of dynamic programming based proof techniques applied in the context of average reward optimization on an uncountable state and action space.
Shibashis Guha, Marcin Jurdzinski, S. Krishna 0004, Ashutosh Trivedi 0001
FSTTCS3
2016 A Logical Characterization for Dense-Time Visibly Pushdown Automata
Devendra Bhave, Vrunda Dave, S. Krishna 0004, Ramchandra Phawade, Ashutosh Trivedi 0001
LATA3
2016 Stochastic Timed Games Revisited
abstract
Stochastic timed games (STGs), introduced by Bouyer and Forejt, naturally generalize both continuous-time Markov chains and timed automata by providing a partition of the locations between those controlled by two players (Player Box and Player Diamond) with competing objectives and those governed by stochastic laws. Depending on the number of players - 2, 1, or 0 - subclasses of stochastic timed games are often classified as 2 1/2-player, 1 1/2-player, and 1/2-player games where the 1/2 symbolizes the presence of the stochastic "nature" player. For STGs with reachability objectives it is known that 1 1/2-player one-clock STGs are decidable for qualitative objectives, and that 2 1/2-player three-clock STGs are undecidable for quantitative reachability objectives. This paper further refines the gap in this decidability spectrum. We show that quantitative reachability objectives are already undecidable for 1 1/2 player four-clock STGs, and even under the time-bounded restriction for 2 1/2-player five-clock STGs. We also obtain a class of 1 1/2, 2 1/2 player STGs for which the quantitative reachability problem is decidable.
S. Akshay 0001, Patricia Bouyer, S. Krishna 0004, Lakshmi Manasa, Ashutosh Trivedi 0001
MFCS3
2015 Compositional modeling and analysis of automotive feature product lines
abstract
Modern automotive systems are composed of hundreds of software-implemented features often interacting with physical subsystems under real-time constraints. For efficient management of their development, the features are conceived and realized as product lines involving variability with different variants being deployed in different vehicle classes. The variability information is expressed at different levels of abstraction during the various phases of development, like requirements, design and implementation. We introduce and study a formal model of such feature product lines capable of capturing variability and real-time behavior. We define a notion of conformance to relate the variability at different levels of abstraction and propose a compositional method of verifying conformance of multiple features. The proposed approach naturally extends to hybrid system behaviors consisting of discrete and continuous plant variables. We demonstrate the applicability of the approach by giving a simple paradigmatic example.
S. Krishna 0004, Ganesh Khandu Narwane, S. Ramesh 0002, Ashutosh Trivedi 0001
DAC1
2015 Revisiting Robustness in Priced Timed Games
abstract
Priced timed games are optimal-cost reachability games played between two players---the controller and the environment---by moving a token along the edges of infinite graphs of configurations of priced timed automata. The goal of the controller is to reach a given set of target locations as cheaply as possible, while the goal of the environment is the opposite. Priced timed games are known to be undecidable for timed automata with 3 or more clocks, while they are known to be decidable for automata with 1 clock. In an attempt to recover decidability for priced timed games Bouyer, Markey, and Sankur studied robust priced timed games where the environment has the power to slightly perturb delays proposed by the controller. Unfortunately, however, they showed that the natural problem of deciding the existence of optimal limit-strategy---optimal strategy of the controller where the perturbations tend to vanish in the limit---is undecidable with 10 or more clocks. In this paper we revisit this problem and improve our understanding of the decidability of these games. We show that the limit-strategy problem is already undecidable for a subclass of robust priced timed games with 5 or more clocks. On a positive side, we show the decidability of the existence of almost optimal strategies for the same subclass of one-clock robust priced timed games by adapting a classical construction by Bouyer at al. for one-clock priced timed games.
Shibashis Guha, S. Krishna 0004, Lakshmi Manasa, Ashutosh Trivedi 0001
FSTTCS2
2015 Bounded-rate multi-mode systems based motion planning
abstract
Bounded-rate multi-mode systems are hybrid systems that can switch among a finite set of modes. Its dynamics is specified by a finite number of real-valued variables with mode-dependent rates that can vary within given bounded sets. Given an arbitrary piecewise linear trajectory, we study the problem of following the trajectory with arbitrary precision, using motion primitives given as bounded-rate multi-mode systems. We give an algorithm to solve the problem and show that the problem is co-NP complete. We further prove that the problem can be solved in polynomial time for multi-mode systems with fixed dimension. We study the problem with dwell-time requirement and show the decidability of the problem under certain positivity restriction on the rate vectors. Finally, we show that introducing structure to the multi-mode systems leads to undecidability, even when using only a single clock variable.
Devendra Bhave, Sagar Jha, S. Krishna 0004, Sven Schewe, Ashutosh Trivedi 0001
HSCC3
2015 What's decidable about recursive hybrid automata?
abstract
Recursive hybrid automata generalize recursive state machines in a similar way as hybrid automata generalize state machines. Recursive hybrid automata can be considered as collection of classical hybrid automata with special states that correspond to potentially recursive invocation of hybrid automata from the collection. During each such invocation, the semantics of recursive hybrid automata permits optional passing of the continuous variables using either pass-by-value or pass-by-reference mechanism. This model generalizes recursive timed automata model introduced by Trivedi and Wojtczak and dense-timed pushdown automata by Abdulla, Atig, and Stenman. We study natural reachability problem for recursive hybrid automata. Given the undecidability of this problem for hybrid automata, it is not surprising that the problem remains undecidable without further restrictions. We consider various restrictions of recursive hybrid automata and characterize the boundaries between decidable and undecidable variants.
S. Krishna 0004, Lakshmi Manasa, Ashutosh Trivedi 0001
HSCC1
2015 Time-Bounded Reachability Problem for Recursive Timed Automata is Undecidable
S. Krishna 0004, Lakshmi Manasa, Ashutosh Trivedi 0001
LATA1
2015 On Pure Nash Equilibria in Stochastic Games
Ankush Das, S. Krishna 0004, Lakshmi Manasa, Ashutosh Trivedi 0001, Dominik Wojtczak
TAMC2
2015 Reachability Games on Recursive Hybrid Automata
abstract
Recursive hybrid automata generalize recursive state machines in a similar way as hybrid automata generalize state machines. Recursive hybrid automata can be considered as collection of classical hybrid automata with special states that correspond to potentially recursive invocation of hybrid automata from the collection. During each such invocation, the semantics of recursive hybrid automata permits optional passing of the continuous variables using either pass-by-value or pass-by-reference mechanism. This model generalizes the recursive timed automata model introduced by Trivedi and Wojtczak and dense-timed pushdown automata by Abdulla, Atig, and Stenman. We study two-player turn-based reachability games on recursive hybrid automata. Given the undecidability of even the reachability problem on hybrid automata, it is not surprising that the problems remain undecidable without further restrictions. We consider various restrictions of recursive hybrid automata where we recover decidability of reachability games and characterize the boundaries between decidable and undecidable variants.
S. Krishna 0004, Lakshmi Manasa, Ashutosh Trivedi 0001
TIME1
2014 Adding Negative Prices to Priced Timed Games
Thomas Brihaye, Gilles Geeraerts, S. Krishna 0004, Lakshmi Manasa, Benjamin Monmege, Ashutosh Trivedi 0001
CONCUR3
2014 First-order Definable String Transformations
abstract
The connection between languages defined by computational models and logic for languages is well-studied. Monadic second-order logic and finite automata are shown to closely correspond to each-other for the languages of strings, trees, and partial-orders. Similar connections are shown for first-order logic and finite automata with certain aperiodicity restriction. Courcelle in 1994 proposed a way to use logic to define functions over structures where the output structure is defined using logical formulas interpreted over the input structure. Engelfriet and Hoogeboom discovered the corresponding "automata connection" by showing that two-way generalised sequential machines capture the class of monadic-second order definable transformations. Alur and Cerny further refined the result by proposing a one-way deterministic transducer model with string variables - called the streaming string transducers - to capture the same class of transformations. In this paper we establish a transducer-logic correspondence for Courcelle's first-order definable string transformations. We propose a new notion of transition monoid for streaming string transducers that involves structural properties of both underlying input automata and variable dependencies. By putting an aperiodicity restriction on the transition monoids, we define a class of streaming string transducers that captures exactly the class of first-order definable transformations.
Emmanuel Filiot, S. Krishna 0004, Ashutosh Trivedi 0001
FSTTCS2
2014 On Unary Fragments of MTL and TPTL over Timed Words
Khushraj Madnani, S. Krishna 0004, Paritosh K. Pandya
ICTAC2
2014 Partially Punctual Metric Temporal Logic is Decidable
abstract
Metric Temporal Logic MTL[UI, SI] is one of the most studied real time logics. It exhibits considerable diversity in expressiveness and decidability properties based on the permitted set of modalities and the nature of time interval constraints I. Henzinger et al., in their seminal paper showed that the non-punctual fragment of MTL called MITL is decidable. In this paper, we sharpen this decidability result by showing that the partially punctual fragment of MTL (denoted PMTL) is decidable over strictly monotonic finite point wise time. In this fragment, we allow either punctual future modalities, or punctual past modalities, but never both together. We give two satisfiability preserving reductions from PMTL to the decidable logic MTL[UI]. The first reduction uses simple projections, while the second reduction uses a novel technique of temporal projections with oversampling. We study the tradeoff between the two reductions: while the second reduction allows the introduction of extra action points in the underlying model, the equisatisfiable MTL[UI] formula obtained is exponentially more succinct than the one obtained via the first reduction, where no oversampling of the underlying model is needed. We also show that PMTL is strictly more expressive than the fragments MTL[UI, S] and MTL[U, SI].
Khushraj Madnani, S. Krishna 0004, Paritosh K. Pandya
TIME2
2013 Some Classes of Generalised Communicating P Systems and Simple Kernel P Systems
S. Krishna 0004, Marian Gheorghe 0001, Ciprian Dragomir
CiE1
2013 Compositional Verification of Software Product Lines
Jean-Vivien Millo, S. Ramesh 0002, S. Krishna 0004, Ganesh Khandu Narwane
IFM3
2012 On the Computability Power of Membrane Systems with Controlled Mobility
S. Krishna 0004, Bogdan Aman, Gabriel Ciobanu
CiE1
2012 Tracing SPLs precisely and efficiently
abstract
In a Software Product Line (SPL), the central notion of implementability provides the requisite connection between specifications (feature sets) and their implementations (component sets), leading to the definition of products. While it appears to be a simple extension (to sets) of the trace-ability relation between components and features, it actually involves several subtle issues which are overlooked in the definitions in existing literature. In this paper, we give a precise and formal definition of implementability over a fairly expressive traceability relation to solve these issues. The consequent definition of products in the given SPL naturally entails a set of useful analysis problems that are either refinements of known problems, or are completely novel. We also propose a new approach to solve these analysis problems by encoding them as Quantified Boolean Formula(QBF) and solving them through Quantified Satisfiability (QSAT) solvers. The methodology scales much better than the SAT-based solutions hinted in the literature and is demonstrated through a prototype tool called SPLANE (SPL Analysis Engine), on a couple of fairly large case studies.
Swarup Mohalik, S. Ramesh 0002, Jean-Vivien Millo, S. Krishna 0004, Ganesh Khandu Narwane
SPLC (1)4
2011 Computability Power of Mobility in Enhanced Mobile Membranes
S. Krishna 0004, Gabriel Ciobanu
CiE1
2011 On Restricted Bio-Turing Machines
abstract
Here we continue the study of bio-Turing machines introduced in [2] and further investigated in [17]. We introduce a restricted model of bio-Turing machine and we investigate its computational power, a hierarchy of languages accepted, and deterministic and nondeterministic variants. A comprehensive example illustrating the modelling power of the introduced machine ends the paper.
Raghavan Rama 0001, Ramesh Hariharasubramanian, Marian Gheorghe 0001, S. Krishna 0004
Fundam. Informaticae4
2011 Enhanced Mobile Membranes: Computability Results
Gabriel Ciobanu, S. Krishna 0004
Theory Comput. Syst.2
2011 Model Checking Weighted Integer Reset Timed Automata
Lakshmi Manasa, S. Krishna 0004, Chinmay Jain
Theory Comput. Syst.2
2009 Membrane computing with transport and embedded proteins
S. Krishna 0004
Theor. Comput. Sci.1
2008 On the Computational Power of Enhanced Mobile Membranes
S. Krishna 0004, Gabriel Ciobanu
CiE1
2008 Updatable Timed Automata with Additive and Diagonal Constraints
Lakshmi Manasa, S. Krishna 0004, Kumar Nagaraj
CiE2
2008 The Expressiveness of Concentration Controlled P Systems
S. Krishna 0004
UC1
2007 On the Computational Power of Flip-Flop Proteins on Membranes
S. Krishna 0004
CiE1
2007 On Sampling Abstraction of Continuous Time Logic with Durations
Paritosh K. Pandya, S. Krishna 0004, Kuntal Loya
TACAS2
2007 Universality results for P systems based on brane calculi operations
S. Krishna 0004
Theor. Comput. Sci.1
2006 Upper and Lower Bounds for the Computational Power of P Systems with Mobile Membranes
S. Krishna 0004
CiE1
2006 On Pure Catalytic P Systems
S. Krishna 0004
UC1
2006 On the Power of Bio-Turing Machines
Ramesh Hariharasubramanian, S. Krishna 0004, Raghavan Rama 0001
UC2
2005 The Power of Mobility: Four Membranes Suffice
S. Krishna 0004
CiE1
2005 Modal Strength Reduction in Quantified Discrete Duration Calculus
S. Krishna 0004, Paritosh K. Pandya
FSTTCS1
2005 Further Results on Contextual and Rewriting P Systems
S. Krishna 0004, Raghavan Rama 0001, Ramesh Hariharasubramanian
Fundam. Informaticae1
2005 P Systems with Mobile Membranes
S. Krishna 0004, Gheorghe Paun
Nat. Comput.1
2003 Breaking DES using P systems
S. Krishna 0004, Raghavan Rama 0001
Theor. Comput. Sci.1
2002 On the Power of P Systems with Contextual Rules
S. Krishna 0004, Lakshmanan Kuppusamy, Raghavan Rama 0001
Fundam. Informaticae1