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Bruno R. Preiss

dblp:p/BrunoRPreiss · DBLP profile ↗
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15ranked-venue papers
5as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 7 · 4 first-authorComputer networks · 6Software engineering, systems software and programming languages · 2 · 2 first-authorHuman-computer interaction and ubiquitous computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
2 papers
Internet architecture and protocols · 66% Network performance modeling · 16% Wireless networking · 14%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Parallel and multicore computing · 51% Processor architecture and microarchitecture · 36% Interconnection networks and networks-on-chip · 13%

Topics — the 10 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Internet architecture and protocols
local area network
0.021985
Short-Packet Transfer Performance in Local Area Ring Networks · IEEE Trans. Computers 1985
Short-Packet Transfer Performance in Local Area Rings · INFOCOM 1984
Internet architecture and protocols › local area network
ring network
0.021985
Short-Packet Transfer Performance in Local Area Ring Networks · IEEE Trans. Computers 1985
Short-Packet Transfer Performance in Local Area Rings · INFOCOM 1984
Parallel and multicore computing
multiprocessor system
0.011988
A Cache-based Message Passing Scheme for a Shared-bus Multiprocessor · ISCA 1988
Internet architecture and protocols › network security
access control protocol
0.011985
Short-Packet Transfer Performance in Local Area Ring Networks · IEEE Trans. Computers 1985
Wireless networking
medium access control
0.011985
Short-Packet Transfer Performance in Local Area Ring Networks · IEEE Trans. Computers 1985
Processor architecture and microarchitecture
dataflow architecture
0.011985
Data Flow on a Queue Machine · ISCA 1985
Interconnection networks and networks-on-chip › bus-based interconnection
shared bus
0.011988
A Cache-based Message Passing Scheme for a Shared-bus Multiprocessor · ISCA 1988
Processor architecture and microarchitecture
multiprocessor architecture
0.011985
Data Flow on a Queue Machine · ISCA 1985
Parallel and multicore computing
task scheduling
0.011985
Data Flow on a Queue Machine · ISCA 1985
Cellular and mobile networks
short packet transmission
0.011984
Short-Packet Transfer Performance in Local Area Rings · INFOCOM 1984

Methods — techniques the papers use, named apart from their topics

simulation · 0.0measurement · 0.0analytical modeling · 0.0
YearPublicationVenuePosition
2010 Improving Dominating Set Routing Performance via Node Mobility Model
abstract
To support seamless communications for roaming users over heterogeneous wireless networks, mobile ad-hoc networks (MANETs) are receiving a special interest in the research community due to its infrastructure-less nature. MANETs can help to achieve a seamless service for users roaming over areas with no coverage from other wireless networks. As a result, MANETs are a key access network component of the super node system that employs the delay tolerant network (DTN) architecture to address user mobility issues. Within the super node system, a dominating-set routing technique is proposed to improve message delivery over MANETs and to achieve better resource utilization. The performance of the dominating set routing technique depends on estimation accuracy of the probability of a future contact between nodes. This paper studies how node mobility can be modeled and used to better estimate the probability of a contact. We derive a distribution for the node-to-node inter-meeting time, and present numerical results to demonstrate that it can be used to improve the dominating-set routing technique performance.
Hany Samuel, Weihua Zhuang, Bruno R. Preiss
GLOBECOM3
2010 Pi: a practical incentive protocol for delay tolerant networks
abstract
Delay Tolerant Networks (DTNs) are a class of networks characterized by lack of guaranteed connectivity, typically low frequency of encounters between DTN nodes and long propagation delays within the network. As a result, the message propagation process in DTNs follows a store-carryand- forward manner, and the in-transit bundle messages can be opportunistically routed towards the destinations through intermittent connections under the hypothesis that each individual DTN node is willing to help with forwarding. Unfortunately, there may exist some selfish nodes, especially in a cooperative network like DTN, and the presence of selfish DTN nodes could cause catastrophic damage to any well designed opportunistic routing scheme and jeopardize the whole network. In this paper, to address the selfishness problem in DTNs, we propose a practical incentive protocol, called Pi, such that when a source node sends a bundle message, it also attaches some incentive on the bundle, which is not only attractive but also fair to all participating DTN nodes. With the fair incentive, the selfish DTN nodes could be stimulated to help with forwarding bundles to achieve better packet delivery performance. In addition, the proposed Pi protocol can also thwart various attacks, which could be launched by selfish DTN nodes, such as free ride attack, layer removing and adding attacks. Extensive simulation results demonstrate the effectiveness of the proposed Pi protocol in terms of high delivery ratio and lower average delay.
Rongxing Lu, Xiaodong Lin 0001, Haojin Zhu, Xuemin Shen, Bruno R. Preiss
IEEE Trans. Wirel. Commun.5
2009 DTN Based Dominating Set Routing for MANET in Heterogeneous Wireless Networking
Hany Samuel, Weihua Zhuang, Bruno R. Preiss
Mob. Networks Appl.3
2008 Routing over Interconnected Heterogeneous Wireless Networks with Intermittent Connections
abstract
The recent years have seen an enormous advance in wireless communication technology and a wide spread of various types of wireless networks. It requires effective inter-networking among the heterogeneous wireless networks in order to support user roaming over the networks while maintaining the connectivity. One of main challenges to achieve the connectivity over a heterogeneous wireless network is potential intermittent connections caused by user roaming. The issue is how to maintain the connection as the user roams and how to ensure service quality in the presence of a long disconnection period. In this paper, we apply the concept of delay tolerant network (DTN) framework to heterogeneous terrestrial wireless networks, and propose a routing scheme to ensure successful communication over an information transport platform that can encounter excessive long delays and intermittent paths. Simulation results demonstrate that our proposed scheme outperforms the epidemic routing based scheme.
Hany Samuel, Weihua Zhuang, Bruno R. Preiss
ICC3
2008 Credit-Based User Authentication for Delay Tolerant Mobile Wireless Networks
abstract
In this paper, a credit-based user authentication scheme is proposed for delay tolerant mobile wireless networks. The proposed authentication scheme isolates the uncertain network condition in the high-delay wireless backhaul with high error rate, and accelerates the overall authentication process when the mobile terminal roams in the visited network. The performance evaluation demonstrates that the proposed credit-based authentication scheme is secure and effectively reduces the overall delay and overhead in user authentication for delay tolerant mobile wireless networks.
Minghui Shi, Khaled Hatem Almotairi, Xuemin Shen, Jon W. Mark, Dongmei Zhao, Bruno R. Preiss
ICC6
2008 DTN based dominating set routing technique for mobile ad hoc networks
abstract
With the wide spread of user mobility and the existence of various types of wireless networks, effective inter-networking is mandatory in order to support user roaming while maintaining the connectivity. In our previous work [1], we propose a system architecture to achieve the connectivity over a he
Hany Samuel, Weihua Zhuang, Bruno R. Preiss
QSHINE3
2002 From Design Patterns to Parallel Architectural Skeletons
Dhrubajyoti Goswami, Ajit Singh, Bruno R. Preiss
J. Parallel Distributed Comput.3
1999 Design patterns for the data structures and algorithms course
abstract
Design patterns have recently emerged as a vehicle for describing and documenting recurring object-oriented designs. More significantly, they offer up a long-awaited framework for teaching good software design. This paper espouses the use of object-oriented design patterns in the teaching of the second course in computer science, viz., the data structures and algorithms course.To use design patterns effectively, it is necessary to present the various data structures and algorithms in a common programming framework. This paper also espouses the use of a single, unified class hierarchy and the commitment to a single design throughout the teaching of the second course.
Bruno R. Preiss
SIGCSE1
1992 A unifying Framework for Distributed Routing Algorithms
Alan Rooks, Bruno R. Preiss
ICPP (1)2
1990 Performance of Discrete Event Simulation on a Multiprocessor Using Optimistic and Conservative Synchronization
Bruno R. Preiss
ICPP (3)1
1988 Semi-Static Dataflow
Bruno R. Preiss, V. Carl Hamacher
ICPP (2)1
1988 A Cache-based Message Passing Scheme for a Shared-bus Multiprocessor
abstract
A scheme for using cache-based hardware to provide simple and efficient message-passing support for message-based software systems on a tightly-coupled, shared-bus multiprocessor is described. This approach is based on the utilization of the existing interprocessor communications medium, the shared bus, to effect the exchange of single-word messages. Communication between processes is accomplished over logical channels using simple, blocking send and receive primitives. The physical processor/channel interface is designed so that the message transfer primitives can be implemented as single machine instructions, namely store and fetch. Special-purpose caches, called message caches, mediate channel operations and effect the exchange of messages over the shared bus.>
Bruno R. Preiss, V. Carl Hamacher
ISCA1
1985 Data Flow on a Queue Machine
abstract
An execution model that supports program reantrancy, recurslon, and automatic run-time loop unravelling is described.This execution model Is based on queue machines that execute acyclic data-flow graphs.The use of separate instruction and data token spaces allows program reentrancy.Execution environments called contexts execute acyclic data-flow graphs associated with high-level code blocks.Iteration and function activation are implemented by the dynamic creation of contexts and do not require the use of tagged tokens.A multiprocessor architecture that supports this execution model is proposed.T~ system architecture is based on a partitioned ring in which each partition of the ring is a conventional processor/memory bus.The proposed architecture has bean simulated in software.A number of test programs have been developed and their execution on the proposed architecture has been evaluated.The performance of the proposed architecture with various numbers of processing elements is described.In addition, a number of task scheduling algorithms are presented and evaluated.
Bruno R. Preiss, V. Carl Hamacher
ISCA1
1985 Short-Packet Transfer Performance in Local Area Ring Networks
abstract
The performance of various access control protocols for bit-serial local area computer network (LACN) rings is studied. Applications in which mnessage packets are of fixed length and shorter than the total inherent propagation delay around the ring are the focus of attention. Token, slotted, and static and dynamic insertion rings are included in the study. In all cases, the transmitting station is responsible for removing its transmitted packet from the ring. Under this type of removal rule, it is possible for the stations of all types of ring structures to execute their access control algorithms with only a short fixed in-line delay in each station. The insertion rings dynamically switch longer delays (insertion registers) into the ring when they are transmitting a packet. The transmitter-remove rule operates in such a way that hogging of the ring transmission facility by a subset of stations cannot occur. Expressions that approximate average transfer time as a function of utilization are derived for all ring types and are checked by simulation. The expressions are found to be quite accurate at low ring utilization levels, which is the case of most importance for LACN's; but some of them exhibit significant errors at high utilization levels. For the assumed, short-packet environment, it is found that token rings exhibit the slowest transfer times, while dynamic insertion rings are fastest.
Wayne M. Loucks, V. Carl Hamacher, Bruno R. Preiss, Luke Wong
IEEE Trans. Computers3
1984 Short-Packet Transfer Performance in Local Area Rings
Wayne M. Loucks, V. Carl Hamacher, Bruno R. Preiss, Luke Wong
INFOCOM3