Demo Data from EDBT 2026 / reviewers in the wild / expert
Jonathan D. Pincus
dblp:p/JDPincus
· DBLP profile ↗
3ranked-venue papers
2as first author
0since 2021 · last 2000
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 2 · 1 first-authorSystems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Software testing · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% | |
| Theoretical computer science
1 paper |
Mathematical optimization · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Software testing
software testing tools |
0.0 | 1 | 2000 | Analysis is necessary, but far from sufficient: Experiences building and deploying successful tools for developers and testers (abstract only) · ISSTA 2000 |
Electronic design automation
physical design |
0.0 | 1 | 1986 | Delay reduction using simulated annealing · DAC 1986 |
Electronic design automation › circuit sizing
transistor sizing |
0.0 | 1 | 1986 | Delay reduction using simulated annealing · DAC 1986 |
Mathematical optimization › metaheuristic optimization
simulated annealing |
0.0 | 1 | 1986 | Delay reduction using simulated annealing · DAC 1986 |
Methods — techniques the papers use, named apart from their topics
program analysis · 0.0timing analysis · 0.0simulated annealing · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2000 | Analysis is necessary, but far from sufficient: Experiences building and deploying successful tools for developers and testers (abstract only)abstractWhy are there so few successful "real-world" programming and testing tools based on academic research? This talk focuses on program analysis tools, and proposes a surprisingly simple explanation with interesting ramifications. Jonathan D. Pincus |
ISSTA | 1 |
| 2000 | A static analyzer for finding dynamic programming errorsabstractThere are important classes of programming errors that are hard to diagnose, both manually and automatically, because they involve a program's dynamic behavior. This article describes a compile-time analyzer that detects these dynamic errors in large, real-world programs. The analyzer traces execution paths through the source code, modeling memory and reporting inconsistencies. In addition to avoiding false paths through the program, this approach provides valuable contextual information to the programmer who needs to understand and repair the defects. Automatically-created models, abstracting the behavior of individual functions, allow inter-procedural defects to be detected efficiently. A product built on these techniques has been used effectively on several large commercial programs. Copyright © 2000 John Wiley & Sons, Ltd. William R. Bush, Jonathan D. Pincus, David J. Sielaff |
Softw. Pract. Exp. | 2 |
| 1986 | Delay reduction using simulated annealingabstractThe MOST program chooses appropriate sizes for transistors in a VLSI schematic to meet specified delay criteria. A simulated annealing algorithm is used in conjunction with a timing analyzer, both written in Prolog. A screening function takes advantage of the symbolic equations provided by the timing analyzer to reject clearly inappropriate choices, so full timing analysis is performed less frequently. Despite running in an interpreted Prolog, performance gains of over 50% versus an unsized circuit can be attained in less than 10 CPU minutes. Jonathan D. Pincus, Alvin M. Despain |
DAC | 1 |