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Reza Pulungan

dblp:p/RezaPulungan · DBLP profile ↗
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12ranked-venue papers
1as first author
5since 2021 · last 2026
0000-0002-5019-1357ORCID · verified

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 6 · 4 since 2021Systems, architecture and hardware · 2Security and privacy · 2 · 1 since 2021Software engineering, systems software and programming languages · 2 · 1 first-authorDatabases, data management, data science and information retrieval · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Memory systems · 27% GPUs and heterogeneous computing · 27% Parallel and multicore computing · 27%

Topics — the 7 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache coherence
0.412020
A Simple Cache Coherence Scheme for Integrated CPU-GPU Systems · DAC 2020
GPUs and heterogeneous computing › CPU-GPU heterogeneous computing
integrated CPU-GPU system
0.412020
A Simple Cache Coherence Scheme for Integrated CPU-GPU Systems · DAC 2020
Parallel and multicore computing › parallel computing › parallel communication
shared-memory communication
0.412020
A Simple Cache Coherence Scheme for Integrated CPU-GPU Systems · DAC 2020
Hardware reliability and fault tolerance
dependability analysis
0.112009
Compositional Dependability Evaluation for STATEMATE · IEEE Trans. Software Eng. 2009
Embedded and real-time systems
model-based design
0.112009
Compositional Dependability Evaluation for STATEMATE · IEEE Trans. Software Eng. 2009
Embedded and real-time systems › real-time scheduling
probabilistic timing analysis
0.112009
Compositional Dependability Evaluation for STATEMATE · IEEE Trans. Software Eng. 2009
Performance modeling and evaluation › markov models
markov decision process
0.012009
Compositional Dependability Evaluation for STATEMATE · IEEE Trans. Software Eng. 2009

Methods — techniques the papers use, named apart from their topics

push-based coherence · 0.4producer-consumer data movement · 0.4probabilistic model checking · 0.1model checking · 0.1
YearPublicationVenuePosition
2026 Fully Homomorphic Encryption Inference of Neural Networks Using CKKS-TFHE Scheme Switching and Accelerated Linear Layers
abstract
Fully homomorphic encryption (FHE) allows neural network inference to be performed directly on encrypted data and models, preserving end-to-end privacy. One of the most widely used FHE schemes, CKKS, supports approximate arithmetic over real numbers and is well-suited for computing polynomial operations. However, CKKS does not natively support conditional branching, making it unsuitable for non-linear functions such as ReLU, which behaves differently depending on whether the input is negative or nonnegative. To address this, ReLU is typically approximated using polynomials. Unfortunately, this approach introduces two key drawbacks: (1) the approximation is only valid within a certain input range, and (2) identifying this range typically requires prior exposure of cleartext data to perform profiling, thus partially compromising privacy. This requirement is problematic in practice, as small profiling errors can lead to substantial accuracy degradation. On the other hand, the TFHE scheme supports binary gate-level computation, enabling precise implementation of conditional operations such as ReLU. Yet TFHE lacks the SIMD capabilities of CKKS, leading to significant computational latency. This paper explores the use of scheme switching for encrypted neural network inference: leveraging CKKS for polynomial-compatible layers and switching to TFHE for layers that require conditional logic, such as ReLU. We demonstrate that this hybrid approach substantially improves the numerical fidelity of encrypted neural network inference: while polynomial approximations suffer from numerical divergence, scheme switching more closely matches non-encrypted inference.
Anas Banta Seutia, Muhammad Zaky Firdaus, Muhammad Alfi Ramadhan, Kabul Kurniawan, Muhammad Husni Santriaji, Alfian Amrizal, Reza Pulungan, Hiroyuki Takizawa
AsiaCCS7
2026 Enhancing temporal matrix factorization by capturing dynamic user preferences and correcting opinion bias
Hartatik, Lukman Heryawan, Reza Pulungan
Eng. Appl. Artif. Intell.3
2025 Hybrid graph structure learning for improving semantic dependency parsing with robust graph neural networks
Irkham Huda, Moh Edi Wibowo, Reza Pulungan
Neurocomputing3
2024 Multi-objective reinforcement learning for bi-objective time-dependent pickup and delivery problem with late penalties
Gemilang Santiyuda, Retantyo Wardoyo, Reza Pulungan, Vincent F. Yu
Eng. Appl. Artif. Intell.3
2023 Named entity recognition and dependency parsing for better concept extraction in summary obfuscation detection
Umar Taufiq, Reza Pulungan, Yohanes Suyanto
Expert Syst. Appl.2
2020 A Simple Cache Coherence Scheme for Integrated CPU-GPU Systems
abstract
This paper presents a novel approach to accelerate applications running on integrated CPU-GPU systems. Many integrated CPU-GPU systems use cache-coherent shared memory to communicate. For example, after CPU produces data for GPU, the GPU may pull the data into its cache when it accesses the data. In such a pull-based approach, data resides in a shared cache until the GPU accesses it, resulting in long load latency on a first GPU access to a cache line. In this work, we propose a new, push-based, coherence mechanism that explicitly exploits the CPU and GPU producer-consumer relationship by automatically moving data from CPU to GPU last-level cache. The proposed mechanism results in a dramatic reduction of the GPU L2 cache miss rate in general, and a consequent increase in overall performance. Our experiments show that the proposed scheme can increase performance by up to 37%, with typical improvements in the 5–7% range. We find that even when tested applications do not benefit from the proposed approach, their performance does not decrease with our technique. While we demonstrate how the proposed scheme can co-exist with traditional cache coherence mechanisms, we argue that it could also be used as a simpler replacement for existing protocols.
Ardhi Wiratama Baskara Yudha, Reza Pulungan, Henry Hoffmann, Yan Solihin
DAC2
2020 A BPSO-based method for high-utility itemset mining without minimum utility threshold
Ridowati Gunawan, Edi Winarko, Reza Pulungan
Knowl. Based Syst.3
2018 Stationary Object Detection for Vision-Based Smart Monitoring System
Wahyono, Reza Pulungan, Kang-Hyun Jo
ACIIDS (2)2
2015 A construction and minimization service for continuous probability distributions
Reza Pulungan, Holger Hermanns
Int. J. Softw. Tools Technol. Transf.1
2009 Compositional Dependability Evaluation for STATEMATE
abstract
Software and system dependability is getting ever more important in embedded system design. Current industrial practice of model-based analysis is supported by state-transition diagrammatic notations such as Statecharts. State-of-the-art modelling tools like Statemate support safety and failure-effect analysis at design time, but restricted to qualitative properties. This paper reports on a (plug-in) extension of Statemate enabling the evaluation of quantitative dependability properties at design time. The extension is compositional in the way the model is augmented with probabilistic timing information. This fact is exploited in the construction of the underlying mathematical model, a uniform continuous-time Markov decision process, on which we are able to check requirements of the form: "The probability to hit a safety-critical system configuration within a mission time of 3 hours is at most 0.01." We give a detailed explanation of the construction and evaluation steps making this possible, and report on a nontrivial case study of a high-speed train signalling system where the tool has been applied successfully.
Eckard Böde, Marc Herbstritt, Holger Hermanns, Sven Johr, Thomas Peikenkamp, Reza Pulungan, Jan-Hendrik Rakow, Ralf Wimmer 0001, Bernd Becker 0001
IEEE Trans. Software Eng.6
2007 Does Clock Precision Influence ZigBee's Energy Consumptions?
Christian Groß 0007, Holger Hermanns, Reza Pulungan
OPODIS3
2005 Model Checking Markov Reward Models with Impulse Rewards
abstract
This paper considers model checking of Markov reward models (MRMs), continuous-time Markov chains with state rewards as well as impulse rewards. The reward extension of the logic CSL (continuous stochastic logic) is interpreted over such MRMs, and two numerical algorithms are provided to check the reachability of a set of goal states under a time and an accumulated reward constraint. This extends existing model-checking techniques for MRMs with just state rewards, and improves the applicability to thousands of states. Our approach is illustrated by using rewards for energy consumption in the setting of dynamic power management.
Lucia Cloth, Joost-Pieter Katoen, Maneesh Khattri, Reza Pulungan
DSN4