The transition to cloud computing offers a large number of benefits, such as lower capital costs and a highly agile environment. Yet, the development of software engineering practices has not kept pace with this change. Moreover, the design and runtime behavior of cloud based services and the underlying cloud infrastructure are largely decoupled from one another.This paper describes the innovative concepts being developed by CloudWave to utilize the principles of DevOps to create an execution analytics cloud infrastructure where, through the use of programmable monitoring and online data abstraction, much more relevant information for the optimization of the ecosystem is obtained. Required optimizations are subsequently negotiated between the applications and the cloud infrastructure to obtain coordinated adaption of the ecosystem. Additionally, the project is developing the technology for a Feedback Driven Development Standard Development Kit which will utilize the data gathered through execution analytics to supply developers with a powerful mechanism to shorten application development cycles.

The emergence of cloud environments has made feasible the delivery of Internet-scale services by addressing a number of challenges such as live migration, fault tolerance and quality of service. However, current approaches do not tackle key issues related to cloud storage, which are of increasing importance given the enormous amount of data being produced in today's rich digital environment (e.g. by smart phones, social networks, sensors, user generated content). In this paper we present the architecture of a scalable and flexible cloud environment addressing the challenge of providing data-intensive storage cloud services through raising the abstraction level of storage, enabling data mobility across providers, allowing computational and content-centric access to storage and deploying new data-oriented mechanisms for QoS and security guarantees. We also demonstrate the added value and effectiveness of the proposed architecture through two real-life application scenarios from the healthcare and media domains.

RESERVOIR project is developing an advanced system and service management approach that will serve as the infrastructure for cloud computing and communications and future Internet of services by creative coupling of service virtualization, grid computing, networking and service management techniques. This paper presents work in progress for the integration and management of such systems into a new generation of managed service infrastructure.

No abstract available.

One possible solution to the verification crisis is to bridge the gap between formal verification and simulation by using hybrid techniques.This paper presents a study of such a functional verification methodology that uses coverage of formal models to specify tests.This was applied to a modern superscalar microprocessor and the resulting tests were compared to tests generated using existing methods.The results showed some 50% improvement in transition coverage with less than a third the number of test instructions, demonstrating that hybrid techniques can significantly improve functional verification.1.

This paper describes a system (AVPGEN) for generating tests (called architecture verification programs or AVP's) to check the conformance of processor designs to the specified architecture. To generate effective tests, AVPGEN uses novel concepts like symbolic execution and constraint solving, along with various biasing techniques. Unlike many earlier systems that make biased random choices, AVPGEN often chooses intermediate or final values and then solves for initial values that can lead to the desired values. A language called SIGL (symbolic instruction graph language) is provided in AVPGEN for the user to specify templates with symbolic constraints. The combination of user-specified constraints and the biasing functions is used to focus the tests on conditions that are interesting in that they are likely to activate various kinds of bugs. The system has been used successfully to debug many S/390 processors and is an integral part of the design process for these processors.>

Petri nets and their languages are a useful model of systems exhibiting concurrent behavior. The sequential language associated with a given Petri net S consists of all possible firing sequences of S, where each element of a firing sequence is a single transition. The concurrent language associated with S consists of all possible concurrent firing sequences of S, where each element of a concurrent firing sequence is a set of transitions. The sequential language and the concurrent language associated with S are denoted by (L)(S) and (/spl pi/)(S), respectively. In this paper, we consider an important special ease of Petri nets, called labeled marked graphs. The main result derived in this paper states that if /spl Gammasub 1/ and /spl Gammasub 2/ are two structurally deterministic labeled marked graphs, then (L)(/spl Gammasub 1/)=L(/spl Gammasub 2/)/spl rlhar2spl pi/(/spl Gammasub 1/)=/spl pi/(/spl Gammasub 2/).>

Abstract A critical problem in the design of editors for structured documents is that of style control, i.e. mapping the logical elements of the documents to their physical appearance on pages. This paper presents a novel approach to style control, used in the Quill document editing system that has been prototyped at the IBM Almaden Research Center. In our approach, the style control mechanism is an integral part of the editing system and consistent with the overall system architecture, in both its inner structure and its user interface. Properties that specify the formatting process, together with action routines for specifying complex semantics, are the basic style control primitives in the proposed approach.

Abstract We consider the problem of covering a weighted graph G = (V, E) by a set of vertex‐disjoint paths, such that the total weight of these paths is maximized. This problem is clearly NP‐complete, since it contains the Hamiltonian path problem as a special case. Three approximation algorithms for this problem are presented, exhibiting a complexity‐performance trade‐off. First, we develop an algorithm for covering undirected graphs. The time complexity of this algorithm is O(|E|log|E|), and its performance‐ratio is ½. Second, we present an algorithm for covering undirected graphs, whose performance‐ratio is ⅔. This algorithm uses a maximum weight matching algorithm as a subroutine, which dominates the overall complexity of our algorithm. Finally, we develop an algorithm for covering directed graphs, whose performanceratio is ⅔. This algorithm uses a maximum weight bipartite matching algorithm as a subroutine, which dominates the overall complexity of the algorithm.

The VLSI-related problem of embedding graphs in books is studied. A book embedding of a graph $G = ( V,E )$ consists of two parts, namely, (1) an ordering of V along the spine of the book, and (2) an assignment of each $e \in E$ to a page of the book, so that edges assigned to the same page do not intersect. In devising an embedding, one seeks to minimize the number of pages used. This paper addresses a generalization of the book embedding problem, called the black/white (b/w) book embedding problem, where a vertex-neighborhood constraint is imposed on the ordering of the vertices. A b/w graph is a pair $( G, U )$, where $G = ( V,E )$ is a graph and $U \subseteq V$ is a set of distinguished black vertices (the vertices in $V - U$ are called white). A b/w book embedding of $( G,U )$ is a book embedding of G, where the black vertices are arranged consecutively along the spine. Given a b/w graph $( G, U )$, the b/w book embedding problem is that of finding a b/w book embedding of $( G,U )$, such that the number of pages is minimized. The need for b/w embeddings may arise, for example, in applications where the input ports of a VLSI chip are to be separated from the output ports. The main result of this paper is a characterization of the b/w graphs that admit a one-page b/w embedding. The characterization is given in terms of a set of forbidden b/w subgraphs, the absence of which is necessary and sufficient for one-page b/w embedding. For a b/w graph with none of these forbidden subgraphs, a one-page b/w embedding is constructible in linear time. The construction utilizes a technique called b/w unfolding, which is a feature of independent interest.

The problem of distributed leader election in an asynchronous complete network, in the presence of faults that occurred prior to the execution of the election algorithm, is discussed. Failures of this type are encountered, for example, during a recovery from a crash in the network. For a network with n processors, k of which start the algorithm that uses at most O(n log k+n+kt) messages is presented and shown to be optimal. An optimal algorithm for the case where the identities of the neighbors are known is also presented. It is noted that the order of the message complexity of a t-resilient algorithm is not always higher than that of a nonresilient one. The t-resilient algorithm is a systematic modification of an existing algorithm for a fault-free network.>